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Based on following table, I have to show if there is any potential pipeline hazard in the following code segments:

  1. X = R2 + Y R4 = R2 + X

  2. R1 = R2 + X X = R3 + Y Z = R1 + X

I've been a bit stuck in the problem involving instruction pipelining.

Any strategy about where to start according to the table?

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  • $\begingroup$ What have you tried? Where did you get stuck? What uncertainty do you have about the concepts, that is preventing you from answering this exercise? Exercises exist to help you identify gaps in your understanding. On this site, we don't want to just solve your exercise for you (that wouldn't help you); rather, we want to help you gain understanding of the concepts. However, as you haven't given us much to work with, it's not clear how to help you. $\endgroup$
    – D.W.
    Apr 14, 2016 at 17:10
  • $\begingroup$ an you edit your post to ask about a specific conceptual issue you're uncertain about? As a rule of thumb, a good conceptual question should be useful even to someone who isn't looking at the specific exercise you happen to be working on. $\endgroup$
    – D.W.
    Apr 14, 2016 at 17:10
  • $\begingroup$ I do have try, I don't find any relation between R1, R2, R3, R4, X and Y functions. The thing is I have been teaching this topic directly from the book with no teacher, a REALLY confusing book that throws exercises of out of nowhere without even covering the concepts before. Note that I am not asking to solve this problem, I ask for strategies and where to start based on that. Here is the book so you have as reference what I am talking about: "The Essentials of Computer Organization and Architecture" 4th Edition $\endgroup$
    – Lou
    Apr 14, 2016 at 17:42
  • $\begingroup$ Please edit your question to include all relevant information, rather than just putting information in the comments (we want questions to stand on their own, so people don't have to read the comments). Incidentally: If the textbook is confusing, it might be time to find a second textbook that works better for you! There are many textbooks and standard resources on computer architecture. There would be little point in us repeating standard material that's already well-described in standard textbooks. $\endgroup$
    – D.W.
    Apr 14, 2016 at 17:50

1 Answer 1

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A data hazard occurs whenever you access a register after updating it. Due to the pipeline structure updating the register happens after it is being accessed by the successive instruction. That is, when accessed, the register holds the old value rather than the updated value.

For instance:

1. R2 = R1 + 1    // update R2
2. R3 = R2 + X    // access R2

Instruction 1 updates R2 at S4 (see the table). Instruction 2 reads R2 at S2. But at this time the new value of R2 is not stored yet -- it will be stored only on the next clock. This problem is the hazard.

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