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4
votes
3answers
721 views

Is order of bits in byte really not of concern?

What I can't wrap my head around is sentence repeated everywhere I look, that order of bits in byte is not important(not of my, as a programmer, concern). My question then is if there is possibility ...
-1
votes
0answers
8 views

Is this valid strict consistency?

Trying to grasp strict versus sequential consistency. Consider the following two threads modifying the same memory value. Thread 1: Read x, Add 2 to x, Write x Thread 2: Read x, Add 10 to x, Write x ...
-1
votes
0answers
38 views

direct map caching (specifically determining the breakdown of the address)

So, here is the prompt: Suppose a computer using direct mapped cache has 32768 (= 32K) bytes of byte-addressable main memory, and a cache of 128 blocks, where each cache block contains 8 bytes and ...
2
votes
1answer
40 views

What is oblivious RAM and how does it work?

Could anybody explain me what exactly oblivious RAM is? I found the following explanation which makes it kind of clear to me, but I would like to get a sense of the technical aspects: Encryption ...
0
votes
1answer
113 views

Comparing random access and sequential access

Assume that we choose randomly $k$ distinct numbers $N_1$, $\dots$, $N_k$ in $\{1, \dots, k\}$ and we have a file of $k$ parts. We have these two cases : We read (or write) sequentially from part ...
0
votes
1answer
62 views

How exactly MOV AX will load data from RAM?

Somewhere on Internet I read : Whenever word size is greater than memory cell size, then there is a need for accessing multiple memory cell Example: for 16 bit processor: MOV AX [2000] To transfer ...
1
vote
0answers
53 views

Maximum memory accessible by the CPU [closed]

I've read multiple times (for example in some of the answers to this question http://stackoverflow.com/questions/8869563/how-much-memory-can-be-accessed-by-a-32-bit-machine) that a CPU with 32 bit ...
2
votes
2answers
89 views

Which part of the computer allocates memory in RAM?

When we declare a variable there will be a random part of memory will be allocated in RAM. Which component will allocate the memory? Is the processor or any other specific hardware doing the ...
2
votes
1answer
2k views

Word- or byte-addressable? Correct terminology

Seemingly, a byte has established itself to be 8bit (is that correct?). RAM and NOR-flash can be normally accessed on a quite granular level, but it is up to the system architecture to determine if ...
-1
votes
1answer
54 views

How to determine the address of an element in a square matrix given the base address? [closed]

I was asked this question in examination. A square matrix $M$ of size $10 \times 10$ is stored in memory with each element requiring 4 bytes of storage. If the base address at $M[0][0]$ is $1840$, ...
0
votes
1answer
621 views

Valid-invalid bit in a process page table

Valid-invalid bit is used to indicate whether a page in a process’s page table is valid or not. Why is it needed? Does that mean that each page table has a certain minimum size, i.e. it can ...
0
votes
2answers
85 views

Valgrind: what is the difference between a store and a modify? [closed]

I am using the Vlagrind lackey tool to examine the full memory reference string of a running computer program and wonder what the difference between a "store" and a "modify" might be - and do these ...
0
votes
0answers
28 views

Applications affected by memory performance

I'm writing a paper on the topic of applications affected more by memory performance than processor performance. I've got a lot written regarding the gap between the two, however I can't seem to find ...
1
vote
0answers
37 views

static paging vocabulary request

What is the term for an algorithm that always requests the same sequence of pages? I recall seeing this concept before buti haven't been able to find anything on Google without more specific ...
1
vote
1answer
107 views

How a program is copied to RAM from harddisk

I know that for executing a program, it should be copied to RAM. But the problem is whole of it may not be copied always. Since the size of the RAM is limited, there is mechanism called virtual ...
0
votes
1answer
2k views

Dynamic loading vs. dynamic linking?

What is the difference between dynamic loading and dynamic linking? Both systems seem to allow shared libraries, but I am struggling to differentiate between them.
1
vote
3answers
718 views

Finding cache block transfer time in a 3 level memory system

Following question was asked in one of entrance exams for a graduation programme. Please help me try to solve it : A computer system has an L1 cache, an L2 cache, and a main memory unity ...
3
votes
3answers
598 views

How DMA improves I/O operation efficiency?

I am reading Computer Architecture & Organization by William Stallings to understand I/O operations. Stallings pretty well explains why Programmed I/O (CPU keeps checking the I/O module register ...
1
vote
1answer
172 views

categories of registers and and storage in them

The Wikipedia article on processor registers mentions: Address registers hold addresses and are used by instructions that indirectly access primary memory. Which addresses does this sentence ...