# Tagged Questions

Questions about memory-management techniques where the computer manages and transfers data between main memory and secondary storage in pages -- discrete chunks of a fixed size. Operating systems often use paging to implement virtual memory.

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### How does first instruction get executed in virtual memory environment?

Currently I'm reading about virtual memory , Now I'm stuck at how CPU generate first virtual address for a process ? how page table is formed ? How this setup had been made?
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### clustering disk pages In the most I/O efficient manner

Let's suppose there're consecutive 5 disk pages (each disk page size = 8KB). P0 P1 P2 P3 P4 Among those 5 pages, we need to read P0, P1 and P3. There are three ways to load those pages: [1] Issue ...
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### How to calculate virtual address space from page size, virtual address size and page table entry size?

I try to solve an exercise, unfortunately without any success yet. From the following given information, the virtual address space should be calculated: Page size is 16 KB Logical address size is ...
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### What are logical addresses and where do they actually reside?

While studying about memory management, paging and segmentation there is a lot of usage of phrases like CPU generates logical addresses and ...
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A machine has 48-bit virtual addresses and 32-bit physical addresses. Pages are 8K. How many entries are needed for a conventional page table ? The answer is 2^35 entries Why not (2^32) / (2^13) = ...
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### Is page size always equal to frame size?

I'm learning about paging. My book says that the logical addresses generated by the CPU are in the form |p|d|(page number, page offset) and the physical addresses ...
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### How to calculate the size of a page in a two level paging CPU?

I am having difficulties with understanding the concept of paging. As a result I've got no idea how I can solve the following exercise - I'm lacking one more equation to solve it. I've read a lot ...
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### Can someone explain this diagram about Slab Allocation?

I'm trying to understand how Slab Allocation works and why it is different or better than ordinary paging. I found this diagram which I believe would be helpful if it had more explanation. Some ...
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### In an Inverted Page Table, will following chains happen very often for small addresses?

I just learned about the Inverted Page Table and immediately thought about the chaining model used. If two processes use the same virtual address, resolving the address will have to include following ...
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### Page Table Size in a 4 Level Hierarchical Page Table

An Intel 64 bit CPU uses a four-level hierarchical page table. Each of the four levels of the page table can contain 512 entries, and the page table size is 4KB. You should be able to see that it ...
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### Clock variant of the Second-Chance page-replacement Algorithm vs. standard Second-Chance Algorithm

A sample question for my upcoming Operating Systems exam is: Under which circumstances would the clock variant [of the second-chance algorithm] be preferred over the standard second-chance ...
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### How does cpu fetch active program data (using virtual address) from storage when there is a page fault?

I read that cpu generates virtual address and using the same mmu translates to physical address and then fetches the data from RAM. But when there is a page fault, the data is fetched from the HDD(or ...
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### Second Chance Page Replacement

In the second chance page replacement algorithm, if a page's reference bit is already set to 1, and the next page in line of the reference string is the same page, does the reference bit stay at 1 or ...
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### Can this question be solved without knowing the Page Table Entry?

I'm preparing for the exams and this question came up - Consider a machine with $64MB$ physical memory and a $32$-bit virtual address space. If the page size is $4KB$, what is the approximate size ...
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### Best design of a software controlled page table: to echo the TLB?

I am building some simple system software for the Microblaze FPGA (actually being run on OVPsim at least for now). The system is to experiment with various memory management regimes. The first ...
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### Does Second chance Page replacement algorithm suffer with Belady's anomaly?

In Second chance Page replacement algorithm(clock algorithm), if all the Reference bits are set to one, then the algorithm behaves just as FIFO. Considering this case, can we conclude that Second ...
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### Hierarchical Paging

Suppose I have a system with 32-bit logical and 16-bit physical address spaces, and the page size is 512 bytes. For simplicity, ignore the valid/invalid bits in the page table. How many sections will ...
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### Given the logical address, how to extract the page number?

I am studying Computer Systems. I have th following question and its answer: Given the logical address 0xAEF9 (in hexadecimal) with a page size of 256 bytes, what is the page number? Answer:...
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### Look Ahead buffer vs Translation Look aside buffer

I know that Translation look aside buffer is used for address translation in paging to achieve better performance. I came across term called Look Ahead buffer in a document which said it implements ...
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### clarification about Algorithm of page replacement LRU with reference bits

Studying LRU approximation Algorithms I think to have not understand how it works, for example: ...
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### Effective Acces time in Demand Paging system with Associative memory

Q: Consider a demand-paging system with a paging disk that has an average access and transfer time of 20 milliseconds. Addresses are translated through a page table in main memory, with an access time ...
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I am looking to calculate the physical address corresponding to a logical address in a paging memory management scheme. I just want to make sure I am getting the calculation right, as I fear I could ...
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### Calculation of effective average instruction execution time in a 2-level paging system

System has a two level paging scheme Average CPU time for a instruction = 100ns Average number of memory accesses per instruction = 2 Regular memory access = 150 ns Page fault service time = ...
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### Processes and Segmentation

The following problem was on my final and in Gate 2006, but I don't understand how to solve it: Different methods of memory management have different overheads: ...
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### How does increasing the page size affect the number of page faults?

If we let the physical memory size remain constant, What effect does the size of the page have on the number of frames? What effect does the number of frames have on the number of page faults? ...