Questions about memory-management techniques where the computer manages and transfers data between main memory and secondary storage in pages -- discrete chunks of a fixed size. Operating systems often use paging to implement virtual memory.

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How to calculate the size of a page in a two level paging CPU?

I am having difficulties with understanding the concept of paging. As a result I've got no idea how I can solve the following exercise - I'm lacking one more equation to solve it. I've read a lot ...
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2answers
63 views

Can someone explain this diagram about Slab Allocation?

I'm trying to understand how Slab Allocation works and why it is different or better than ordinary paging. I found this diagram which I believe would be helpful if it had more explanation. Some ...
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1answer
22 views

In an Inverted Page Table, will following chains happen very often for small addresses?

I just learned about the Inverted Page Table and immediately thought about the chaining model used. If two processes use the same virtual address, resolving the address will have to include following ...
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1answer
77 views

Page Table Size in a 4 Level Hierarchical Page Table

An Intel 64 bit CPU uses a four-level hierarchical page table. Each of the four levels of the page table can contain 512 entries, and the page table size is 4KB. You should be able to see that it ...
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Clock variant of the Second-Chance page-replacement Algorithm vs. standard Second-Chance Algorithm

A sample question for my upcoming Operating Systems exam is: Under which circumstances would the clock variant [of the second-chance algorithm] be preferred over the standard second-chance ...
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52 views

How does cpu fetch active program data (using virtual address) from storage when there is a page fault?

I read that cpu generates virtual address and using the same mmu translates to physical address and then fetches the data from RAM. But when there is a page fault, the data is fetched from the HDD(or ...
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1answer
53 views

Second Chance Page Replacement

In the second chance page replacement algorithm, if a page's reference bit is already set to 1, and the next page in line of the reference string is the same page, does the reference bit stay at 1 or ...
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1answer
40 views

Can this question be solved without knowing the Page Table Entry?

I'm preparing for the exams and this question came up - Consider a machine with $64MB$ physical memory and a $32$-bit virtual address space. If the page size is $4KB$, what is the approximate size ...
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1answer
61 views

Best design of a software controlled page table: to echo the TLB?

I am building some simple system software for the Microblaze FPGA (actually being run on OVPsim at least for now). The system is to experiment with various memory management regimes. The first ...
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1answer
424 views

Does Second chance Page replacement algorithm suffer with Belady's anomaly?

In Second chance Page replacement algorithm(clock algorithm), if all the Reference bits are set to one, then the algorithm behaves just as FIFO. Considering this case, can we conclude that Second ...
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2answers
163 views

Operating System Paging concept

I am quoting a paragraph from the book "Operating System Principles" by Galvin. Usually, each page-table entry is 4 bytes long, but that size can vary as well. A 32-bit entry can point to one of ...
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1answer
149 views

Calculating cache memory based on LRU algorithm

Assuming i have 4 blocks of cache memory, Using the LRU (Least Recently Used) replacement algorithm on this following sequence of access to memory blocks: 1 2 3 4 5 2 5 4 1 5 2 3 : ...
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205 views

Practical Page-Replacement Algorithms

Could anyone suggest other page replacement algorithms that are applicable to the real world aside from FIFO, Second Chance (Clock), Enhanced Second Chance and Random?
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1answer
1k views

What's the difference between Clock and Second Chance Page-Replacement Algorithm?

I know that they both have reference bit, but I only understand the Second Chance but not the Clock Page-Replacement algorithm. could anyone help me understand?
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1answer
507 views

What is the difference between LRU implemented for a cache and for page replacement?

I have read that true LRU page replacement requires significant hardware support, so only approximation of LRU is implemented for page replacement. So I wanted to contrast LRU that is implemented for ...
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1answer
82 views

Maximum amount of memory that can be allocated to a process

DISCLAIMER: The following scenario was taken from an assignment I got in a OS course I'm taking, and it arose a lot of question marks in my head. However non of the questions asked by myself here ...
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4k views

Clock page replacement algorithm - Already existing pages

When simulating the clock page replacement algorithm, when a reference comes in which is already in memory, does the clock hand still increment? Here is an example: With 4 slots, using the clock ...
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0answers
413 views

Size of memory in 64-bit computer system

I'm new here, a brief intro, I'm a student majoring in comp-sci. Right now I'm having a bit of confusion to answer one of my assignments, it is about system paging. I want to know how am I able to ...
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170 views

Are there any garbage collectors that take into account paging?

Garbage collections have to visit all objects that are alive, so as to find the memory that can be reclaimed. (Having many generations’ just delays this a bit) All things being equal, it is ...
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1answer
113 views

Hierarchical Paging memory requirements

OS Book written by Galvin et all states that if page size is 4KB and size of virtual space is 32 bits then 2^(32-12) page entries would be required which is too huge to store in memory!! Therefore ...
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1answer
229 views

Does virtual address space resides in virtual memory?

I have several confusion like : Does virtual address space resides in virtual memory ? Does each process has its own virtual address space like each process has its own virtual memory and own page ...
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252 views

Segmentation and paging

I am given a system with a segmented paging architecture. Both physical and virtual address spaces contain $2^{16}$ bytes each. The virtual address space is divided in $8$ equal size segments. The ...
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871 views

want to know concept behing Multilevel paging

In order to use large size page table hierarchical paging is done . In case of two level page table scheme . for : logical address space - 32bit - $2^32$ page size - 4kb i.e $2^12$ It is mentioned ...
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1answer
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Hierarchical Paging

Suppose I have a system with 32-bit logical and 16-bit physical address spaces, and the page size is 512 bytes. For simplicity, ignore the valid/invalid bits in the page table. How many sections will ...
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2answers
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Given the logical address, how to extract the page number?

I am studying Computer Systems. I have th following question and its answer: Given the logical address 0xAEF9 (in hexadecimal) with a page size of 256 bytes, what is the page number? ...
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1answer
1k views

Look Ahead buffer vs Translation Look aside buffer

I know that Translation look aside buffer is used for address translation in paging to achieve better performance. I came across term called Look Ahead buffer in a document which said it implements ...
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249 views

clarification about Algorithm of page replacement LRU with reference bits

Studying LRU approximation Algorithms I think to have not understand how it works, for example: ...
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Effective Acces time in Demand Paging system with Associative memory

Q: Consider a demand-paging system with a paging disk that has an average access and transfer time of 20 milliseconds. Addresses are translated through a page table in main memory, with an access time ...
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13k views

How to work out physical address corresponding to logical address?

I am looking to calculate the physical address corresponding to a logical address in a paging memory management scheme. I just want to make sure I am getting the calculation right, as I fear I could ...
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2answers
5k views

Calculation of effective average instruction execution time in a 2-level paging system

System has a two level paging scheme Average CPU time for a instruction = 100ns Average number of memory accesses per instruction = 2 Regular memory access = 150 ns Page fault service ...
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1answer
361 views

Processes and Segmentation

The following problem was on my final and in Gate 2006, but I don't understand how to solve it: Different methods of memory management have different overheads: ...
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2answers
4k views

How does increasing the page size affect the number of page faults?

If we let the physical memory size remain constant, What effect does the size of the page have on the number of frames? What effect does the number of frames have on the number of page faults? ...
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1answer
3k views

Swap space management during pure demand paging

The following is a doubt that I came across while doing a OS home assignment - however, it seems more concept-based than a straightforward coding question, so IMHO I don't think the homework tag is ...
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1answer
1k views

How to interpret “Windows - Virtual Memory minimum too low” from a CS student point of view?

On my old 256MB RAM, pc I get this message. (I guess it is quite common) Windows - Virtual Memory minimum too low Your system is low on virtual memory. Windows is increasing the size of your ...