Questions about techniques for providing the appearance of an isolated, contiguous address space to each process. The size of the address spaces may be made to appear larger than the size of main memory by moving pages or segments between main memory and a larger backing store.

learn more… | top users | synonyms

-1
votes
0answers
11 views

How does first instruction get executed in virtual memory environment?

Currently I'm reading about virtual memory , Now I'm stuck at how CPU generate first virtual address for a process ? how page table is formed ? How this setup had been made?
2
votes
1answer
23 views

Why not space out memory allocations?

In ext4 file system, the files are spaced out as far apart as reasonably possible to allow for efficient reallocation. Why do we not do this in memory? Why not allocate one memory as page 20, and the ...
1
vote
0answers
21 views

How are LRU and Clock algorithm different?

I am modeling the Gclock-pro buffer replacement algorithm in Linux kernel. Because there are many existing modeling works on LRU, I am considering adopting LRU model to roughly describe Gclock-pro, ...
0
votes
0answers
5 views

Virtual Machine RAM Allocation [migrated]

I want to know if I can use a 32 bit Host OS to run Virtual Machines (VM) using the remaining RAM installed on the host environment. I am specifically interested in VirtualBox, Windows 10 32 bit, and ...
-1
votes
2answers
31 views

How many times do we access memory with a TLB?

As I understand it, when we are on a virtual memory based system, we have to access memory 2 times (one for the Page Table and one for the physical address in RAM). But, how many times would we have ...
-4
votes
0answers
27 views

What does “translation time” mean in this problem statement?

I'm trying to answer a question I've been set about the time taken by a program that makes a certain number of memory requests, leading to some page faults and some TLB faults. The question says, ...
-1
votes
1answer
48 views

How many pages does the page table require?

I have found this exercise on the Internet but I´m having problems with sections 4 and 5, because I don´t understand where do the solutions appear from. Example: Mapping VAs to PAs Suppose - ...
0
votes
1answer
22 views

Difference between word logical addressing and byte logical addressing in this exercise?

I´m new here and this is the first question I´m posting (hopefully this is the correct site). I have the exercise below: Consider a virtual address space of 10 pages of 1024 words each (1 word = 2 ...
0
votes
1answer
31 views

Not sure about a part of an answer - page table size question

Below is a question and answer that I'm reviewing. I understand most of it but I'm not clear where the 8 bits for the PTE size came from in this part... ...
1
vote
1answer
31 views

Effect of Copy-On-Write on 2 processes sharing address space

I am studying operating systems and was going through Copy On Write mechanism. From Wiki: When one process modifies the memory, the operating system's kernel intercepts the operation and copies ...
1
vote
0answers
92 views

How to calculate virtual address space from page size, virtual address size and page table entry size?

I try to solve an exercise, unfortunately without any success yet. From the following given information, the virtual address space should be calculated: Page size is 16 KB Logical address size is ...
1
vote
1answer
29 views

Address space definition

I'm learning by my self about OS theory and I have some troubles to understand what is a process address space. So far, I came across two definitions of what a process address space is: 1 - The set ...
1
vote
1answer
52 views

What are logical addresses and where do they actually reside?

While studying about memory management, paging and segmentation there is a lot of usage of phrases like CPU generates logical addresses and ...
0
votes
1answer
32 views

Page vs page table entry

Im studying for OS-finals and I cant figure out the difference. A page is a chunk of addresses e.g 0-4095. This maps to 4kB of memory. This page is 4kB big. But according to the litterature the Page ...
0
votes
1answer
63 views

finding maximum virtual and physical memory

If the following is given: CPU uses a four-level hierarchical page table, each level can contain 512 entries the page size is 4KB. virtual address is 48 bits How do i get the size of the ...
-3
votes
1answer
34 views

Virtual address lookup without using all the space to store the physical addresses [closed]

How is a virtual address mapped to a physical address? The most logical solution I, with my meager knowledge, can think of would be to actually store the physical address. The problem with the above ...
0
votes
1answer
58 views

Number of addresses in a memory region

So I am looking at some Operating Systems exercises and we have A swapping system eliminates holes by compaction. Assuming a random distribution of many holes and many data segments ...
-3
votes
2answers
63 views

What's the difference between clock replacement & LRU replacement?

As title. When we want to request following page numbers 2,4,4,2,5,2,1,1,3,1, is clock replacement better? What are the advantages and disadvantages of them? Thanks~
0
votes
1answer
53 views

Why is the processes address space a continuous block in RAM?

I need some clarification regarding how the process address space is organized in memory. I went through basic concepts of virtual memory and adress translation and according to the size of the page, ...
2
votes
2answers
336 views

Virtual Address and Physical Address Space

A machine has 48-bit virtual addresses and 32-bit physical addresses. Pages are 8K. How many entries are needed for a conventional page table ? The answer is 2^35 entries Why not (2^32) / (2^13) = ...
1
vote
2answers
133 views

Difference between virtual memory and job pool

Both virtual memory and job pools store the processes temporarily on disk and bring them to memory at some later stage, so what is the actual difference in between them? What I guess is that when a ...
1
vote
1answer
82 views

Why is data fragmentation not possible on main memory (RAM)?

I am wondering why data fragmentation is a problem on main memory. On a software level, virtual addresses are used anyway. So why can one address space not be split up into multiple segments, like a ...
1
vote
2answers
358 views

How to calculate the size of a page in a two level paging CPU?

I am having difficulties with understanding the concept of paging. As a result I've got no idea how I can solve the following exercise - I'm lacking one more equation to solve it. I've read a lot ...
7
votes
1answer
79 views

Page management in OS kernels

I looked at some old OS theory books of mine and noticed that one glaring omission in all of these OS books is how to actually keep track of physical pages that are free (i.e. algorithms for actually ...
1
vote
1answer
47 views

In an Inverted Page Table, will following chains happen very often for small addresses?

I just learned about the Inverted Page Table and immediately thought about the chaining model used. If two processes use the same virtual address, resolving the address will have to include following ...
0
votes
1answer
94 views

Understanding Logical to Physical Addressing

I am trying to understand the concept of logical to physical addressing. I am given 72 physical addresses (0-71) with values A virtual address = 2^(p+w) p = page bits w = word bits I know the page ...
1
vote
2answers
1k views

Would it be possible to use the cloud for RAM?

I'm not sure if this is the right place to ask but I had this idea. Since the cloud can be used for storing memory, would it be possible to use it for RAM too?
2
votes
0answers
50 views

When there's no memory, should malloc or read/write fail?

To my surprise, I recently found out that Windows would fail a large memory allocation even if little of said memory is to actually be used, e.g. even if you don't want the swap, you better not ...
2
votes
1answer
424 views

Page Table Size in a 4 Level Hierarchical Page Table

An Intel 64 bit CPU uses a four-level hierarchical page table. Each of the four levels of the page table can contain 512 entries, and the page table size is 4KB. You should be able to see that it ...
-2
votes
1answer
240 views
0
votes
1answer
136 views

How does cpu fetch active program data (using virtual address) from storage when there is a page fault?

I read that cpu generates virtual address and using the same mmu translates to physical address and then fetches the data from RAM. But when there is a page fault, the data is fetched from the HDD(or ...
3
votes
2answers
205 views

Why does quicksort work well with virtual memory?

Introduction to Algorithms said that quicksort "works well even in virtual-memory environments," but didn't explain why. I've tried looking an Wikipedia and Stack Exchange, but found no reason why. Is ...
-1
votes
1answer
19 views

Why we need tagbits when we already have indexbit and offset?

I was watching a lecture and got confused at one point when professor said that to distinguish between two addresses having same values of offset as well as index bit we need tag.Why we need tag ? for ...
0
votes
1answer
218 views

What is the overhead of Virtual Memory?

What is the price paid for the vast virtual address space provided to programmers for their applications? Or in other words, what is the overhead due to virtual memory? Is there any other overhead ...
1
vote
1answer
720 views

Does Second chance Page replacement algorithm suffer with Belady's anomaly?

In Second chance Page replacement algorithm(clock algorithm), if all the Reference bits are set to one, then the algorithm behaves just as FIFO. Considering this case, can we conclude that Second ...
1
vote
1answer
793 views

What problem does cache coloring solve?

According to what I have read from two different sources, cache coloring is (was?) required in order to: Counter the problem of aliasing: Prevent two different virtual addresses with the same ...
0
votes
2answers
289 views

Operating System Paging concept

I am quoting a paragraph from the book "Operating System Principles" by Galvin. Usually, each page-table entry is 4 bytes long, but that size can vary as well. A 32-bit entry can point to one of $...
1
vote
1answer
53 views

Role of the MMU in a Page Fault Swap

When a virtual memory address outside the range of loaded into physical RAM is referenced and a page fault occurs, does the Memory Management Unit rely on DMA (Direct Memory Access) to swap the ...
0
votes
0answers
72 views

Roles of the Memory Management Unit

I know that the first instruction stored in BIOS is "mapped" to memory address 0, and that a signal on the reset pin to the microprocessor causes this instruction to be fetched, beginning the POST and ...
2
votes
1answer
349 views

How are system calls handled in a virtual machine?

Quoting wikipedia, a system call is: In computing, a system call is how a program requests a service from an operating system's kernel. This may include hardware related services (e.g. ...
10
votes
1answer
138 views

Memory ballooning in the OS

Some hypervisors optimize memory usage using a method that is called ballooning (at least that's what KVM calls it), this method deduplicates memory between VMs and sets common pages to read-only with ...
0
votes
1answer
40 views

Name for almost random memory distribution on the heap

If I had a heap like the following: with blue blocks being occupied memory and white blocks being free memory What is the general name given to the situation illustrated, where the free and ...
0
votes
0answers
124 views

What are current cache algorithms and cache strategies?

Which cache strategies/algorithms (especially for L2 Cache) are used in practice and don't exist solely in research/theory? There is a list on Wikipedia which does not state which algorithms are ...
0
votes
1answer
46 views

In Pagination, how does the S.O. knows where the page is in secondary Memory?

So every process has its own Page Table, the page table references the frame where the page is in physical memory and also has a valid-invalid bit that tells whether it is in physical memory or in ...
2
votes
1answer
227 views

Maximum amount of memory that can be allocated to a process

DISCLAIMER: The following scenario was taken from an assignment I got in a OS course I'm taking, and it arose a lot of question marks in my head. However non of the questions asked by myself here ...
5
votes
2answers
11k views

Clock page replacement algorithm - Already existing pages

When simulating the clock page replacement algorithm, when a reference comes in which is already in memory, does the clock hand still increment? Here is an example: With 4 slots, using the clock ...
-1
votes
1answer
509 views

Does virtual address space resides in virtual memory?

I have several confusion like : Does virtual address space resides in virtual memory ? Does each process has its own virtual address space like each process has its own virtual memory and own page ...
-1
votes
1answer
105 views
3
votes
1answer
5k views

How does a TLB and data cache work?

I'm trying to study for an exam and I realized I'm confused about how the TLB and data cache work. I understand that the TLB is essentially a cache of most recently used physical addresses. However, ...
1
vote
1answer
1k views

Understanding the basic concepts in memory organisation

(Before actually proceeding to the question, I want to confess that this is a homework question, please do consider it and help me in improving my understanding a bit more.) I have recently started ...