Timeline for Difference between memory access and write-back in RISC pipeline
Current License: CC BY-SA 3.0
4 events
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| Jan 14, 2014 at 5:04 | comment | added | Pseudonym♦ |
If you're using the MIPS/DLX-ish instruction set (which it appears you are), ST stores a result in memory. In this case, the location pointed to by the address 0(R2). In CPU-speak, "store" refers to storing a location in memory. If you were transferring a value in one register into another register, it would be called a "move".
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| Jan 13, 2014 at 16:30 | vote | accept | Stanley Fox | ||
| Jan 13, 2014 at 10:38 | comment | added | Stanley Fox |
This is what I don't understand though. Doesn't store do exactly what the name says? It stores a given result in a register. In this case R1 into 0(R2). I don't get why there is a difference in loading a value into a register, i.e. I1, and storing in a register, i.e. I3.
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| Jan 13, 2014 at 4:16 | history | answered | Pseudonym♦ | CC BY-SA 3.0 |