Timeline for How exactly the "load word" instruction loads from RAM?
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| Jul 31, 2014 at 14:42 | comment | added | user4577 | By the way, the justification (Richard L. Sites, "The Alpha AXP Architecture", Digital Technical Journal, Vol. 4, No. 4, Special Issue, 1992) for lack of load/store byte was the extra delay of more variable shifting for loads and stores and the issue of ECC overhead (5 ECC bits per byte or requiring read-modify-write). | |
| Jul 31, 2014 at 12:19 | history | answered | Wandering Logic | CC BY-SA 3.0 |