4 Original logic diagram was incorrect. Both inputs to an XOR common will *always* yield logic 0 as an output. An inverter is formed by tying one input to logic 1. In this case I also optimised the solution, eliminating an unneeded gate. edit approved Oct 30 '15 at 16:50 Ion 322 bronze badges Hmmm. It can't be done with boolean algebra that's for sure, but I could wire one up physically. The trick is wiring one of the inputs to a power lead of anotheran XOR gate.  I1 I2 | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |---|> | \ V / | \ / |I2 \ / | V | | | 0 /-+-\I1 | | | | \| |/ | |\ / | | .|---| \ / |--------/ \ V / \ / \ / V |   | AND OUTPUT  BothThe XOR gates aregate is wired up as NOT gatesa non inverting buffer. The trick involved is that if you wire VCC to GND (or by extension a logic ground), the output is a weak GND. Disclaimer: this works on the silicon I have, but might not work on all silicon. Hmmm. It can't be done with boolean algebra that's for sure, but I could wire one up physically. The trick is wiring one of the inputs to a power lead of another.  I1 I2 | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |---|> | \ V / | \ / | \ / | V | | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |--------/ \ V / \ / \ / V |   | AND OUTPUT  Both XOR gates are wired up as NOT gates. The trick involved is that if you wire VCC to GND (or by extension a logic ground), the output is a weak GND. Disclaimer: this works on the silicon I have, but might not work on all silicon. Hmmm. It can't be done with boolean algebra that's for sure, but I could wire one up physically. The trick is wiring one of the inputs to a power lead of an XOR gate.  I2 | 0 I1 | | | | \| |/ | |\ / | | .|---| \ / |--------/ \ V / \ / \ / V | AND OUTPUT  The XOR gate is wired up as a non inverting buffer. The trick involved is that if you wire VCC to GND (or by extension a logic ground), the output is a weak GND. Disclaimer: this works on the silicon I have, but might not work on all silicon. 3 added 155 characters in body edited Oct 29 '15 at 15:18 Joshua 29922 silver badges99 bronze badges Hmmm. It can't be done with boolean algebra that's for sure, but I could wire one up physically. The trick is wiring one of the inputs to a power lead of another.  I1 I2 | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |---|> | \ V / | \ / | \ / | V | | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |--------/ \ V / \ / \ / V | | AND OUTPUT  Both XOR gates are wired up as NOT gates. The trick involved is that if you wire VCC to GND (or by extension a logic ground), the output is a weak GND. Disclaimer: this works on the silicon I have, but might not work on all silicon. Hmmm. It can't be done with boolean algebra that's for sure, but I could wire one up physically. The trick is wiring one of the inputs to a power lead of another.  I1 I2 | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |---|> | \ V / | \ / | \ / | V | | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |--------/ \ V / \ / \ / V | | AND OUTPUT  Disclaimer: this works on the silicon I have, but might not work on all silicon. Hmmm. It can't be done with boolean algebra that's for sure, but I could wire one up physically. The trick is wiring one of the inputs to a power lead of another.  I1 I2 | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |---|> | \ V / | \ / | \ / | V | | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |--------/ \ V / \ / \ / V | | AND OUTPUT  Both XOR gates are wired up as NOT gates. The trick involved is that if you wire VCC to GND (or by extension a logic ground), the output is a weak GND. Disclaimer: this works on the silicon I have, but might not work on all silicon. 2 I'm a rotten speller. edited Oct 29 '15 at 3:45 Joshua 29922 silver badges99 bronze badges Hmmm. It can't be done with boolean algebra that's for sure, but I could wire one up physically. The trick is wiring one of the inputs to a power lead of another.  I1 I2 | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |---|> | \ V / | \ / | \ / | V | | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |--------/ \ V / \ / \ / V | | AND OUTPUT  Disclaimer: this works on the siliconesilicon I have, but might not work on all siliconesilicon. Hmmm. It can't be done with boolean algebra that's for sure, but I could wire one up physically. The trick is wiring one of the inputs to a power lead of another.  I1 I2 | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |---|> | \ V / | \ / | \ / | V | | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |--------/ \ V / \ / \ / V | | AND OUTPUT  Disclaimer: this works on the silicone I have, but might not work on all silicone. Hmmm. It can't be done with boolean algebra that's for sure, but I could wire one up physically. The trick is wiring one of the inputs to a power lead of another.  I1 I2 | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |---|> | \ V / | \ / | \ / | V | | | /-+-\ | | | | \| |/ | |\ / | | .|---| \ / |--------/ \ V / \ / \ / V | | AND OUTPUT  Disclaimer: this works on the silicon I have, but might not work on all silicon. 1 answered Oct 29 '15 at 2:53 Joshua 29922 silver badges99 bronze badges