It would be possible for that access, but nevertheless, it is not a good idea.
Even with relatively small caches, the cache miss rate of most programs is well under 10%. If a designer did what you proposed, what would likely happen is
access 1 is looked up in the cache while a memory access is started;
the cache reports the lookup is a success;
the next instruction that wants to access memory now cannot proceed. It could look up the cache, but (with your scheme) it would need to look up memory at the same time, and the memory subsystem is still working on access 1. (In fact, in has just started working on it.)
The point is that the memory subsystem cannot possibly support as anywhere near
as many lookups per second as the CPU can issue. One of the points of the cache is reduce the load on it to level it can support.