How to calculate a direct mapped chace capacity with tag and valid bits?

I've seen some very useful posts about this, but none took into consideration both the tag and valid bits. This is a question I took from a notebook in my computer engineering course.

Consider a machine with a direct mapped cache, with 1 Byte blocks and 7 bits for the tag. This machine has a RAM with 2 KB capacity. Calculate the cache's total capcity, counting the tag bits and valid bits.

Breaking a cache into parts, I have the tag bits, set index and block offset.

I already know I have 7 tag bits, but then I'm really not sure how to calculate the rest, because in this type of question we are usually given the words per block. I think the offset is 3, because 2^3 (8 bit blocks).

I feel like the question itself doesn't give enough, shouldn't it be stated how the system address is (byte/word addressable)? Also, is the RAM capacity relevant to the question at hand?

Unless specified otherwise, addresses are always byte adresses (and with a cache with 1B/block, any other choice would not make sense)

Ram size is relevant as it indicates addresse width.

Cache blocs are 1 byte -> offset=0b (offset indicates byte position in block and only 1 possible position).

RAM is 2kB (2^11) -> address is 11 bits