If a NAND gate can be used to construct all other of the basic logic gates, then I'm wondering why you don't/can't have a purely NAND-based One Instruction Set Computer (OISC). All the OISC single instructions are complicated like "addleq, add and branch if less than or equal to zero", but I don't see why you can't just have an OISC be "nand, perform nand operation". Wondering what I am missing.
The NAND gate is "universal" in that a network of NAND gates can implement any combinational or sequential logic function.
So to construct a "program" out of NANDs all you need is a way of specifying the network that interconnects them.
So if every NAND gate in your "computer" has a address, and the list of instructions is of the form
inputA,inputB you might have a start on a "computer" with one instruction that's a NAND. (I think you'll have to come up with a parallel semantics, no instruction pointer.)
With such an instruction set, all you could express are straight-line programs. Without branches, you can't have loops. Thus, the program would not be able to handle arbitrary-length inputs: it would be limited to dealing with fixed-size inputs (or inputs with a fixed known upper bound on the size of the input). So, that wouldn't be very satisfactory.