Why would it be suitable to design an instruction set with 2-bits allocated for the register number and 10-bits allocated for the memory address? Would introducing a cache change this? (If possible I'd like to know why or where to find an explanation on this.)
If it helps an example would look like this
0001 xxyy yyyy yyyy and an instruction would be the opcode
0001 (Load) register
xx from memory address
yy yyyy yyyy.