I had a question in my past System Architecture exam and I am not sure how to solve it.
Question was this:
Consider a 16-bit addressable memory and a direct-mapped cache sized 64 bytes. MAR is 10 bits and a block in memory is 8 bytes sized. Find $t$, $r$ and $w$ (they are Tag, cache index, and block offset respectively.)
Can you show steps of solution of this and such questions? Should I divide cache size by 2 since it is 2 byte addressable? Thanks.