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I have recently came across half-adders and full adders in my Logic Network lectures. I have somewhat understood the theory, but I am still unable to understand the reason why they called them in that name? I mean, is there any reason why half-adders have the name ‘half-adders’?

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With a full adder, you can get all outputs from (0,0) to (1,1). With a half adder, you can never get (1,1), which makes it, in a way, incomplete.

Also, in practice a full adder is used more than a bare half adder. For example, addition of binary numbers (one of the most common operations needed by a microprocessor) is done by chaining full adders:

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(4-bit adder, taken from Wikipedia)

In the end, since full adders are the ones used for adding, we call them "full" adders.

And since a full adder can be made by joining up two half adders with an OR gate, the half adder becomes "half" an adder.

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I can't cite an historical reference, but I would suspect a "half adder" is called that because you can combine two of them (with an or gate combining the carries) to make a "full adder".

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The half adder can add only two input bits (A and B) and has nothing to do with the carry if there is any in the input. So if the input to a half adder have a carry, then it will neglect it and adds only the A and B bits. That means the binary addition process is not complete and that’s why it is called a half adder.

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