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While exploring the various types of data hazards in a pipeline, I came across a statement in my book which said that anti-dependency mayn't lead to cycle stalling.

But i couldnt find at example for the same. Can anyone help me with it please?

Thanks in advance!

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You can eliminate anti-dependences (WAR dependences) with register renaming, so if you're doing renaming there will be no stalls from anti-dependences. The other case is if you already know the write isn't going to interfere with the read (for example you know all the instructions with reads in them have already done their register reads).

Note that the traditional "5-stage" pipeline is doing the equivalent of register renaming using its bypass registers, so in that case you never need to stall.

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