In VLIW architecture, the compiler/and or assembly writer chooses instructions that can be executed in parallel
The meaning of this sentence is that in VLIW architecture, assembler (machine) code defines which instruction will be executed in parallel, so it's fixed at the time assembly code is written by a human or generated by a compiler.
This differs from super-scalar cpus, where instructions may be executed in parallel, this is a decision made by CPU each time it executes the instructions.
There are also CPUs that combine both approaches - Itanium2 is backward-compatible with Itanium, packing 3 instructions into VLIW word. But, afair, Itanium2 can execute two such packs in the single CPU cycle, and this decision is made at execution time.