This is an online question I am trying to solve.
You are given a non-pipelined processor design which has a cycle time of 10ns and average CPI of 1.4.If a pipelined processor having 5 stages are 1ns, 1.5ns, 4ns, 3ns, and 0.5ns, what is the best speedup you can get compared to the original processor?
Approach I: In a pipelined architecture, in a steady state, the CPI tends to be 1 provided there is no fixed percent of NOPs. Thus Speed up = CPI_non_pipelined / CPI_pipelined = 1.4 /1 = 1.4
Approach II: For converting the execution into pipelined, we need to reduce the cycle to match up phase duration. Thus pipelined cycle should be max of {phase durations} = max of {1ns, 1.5ns, 4ns, 3ns, and 0.5ns} = 4ns. So speed up = cycle_duration_non_pipelined / cycle_duration_pipelined = 10/4 = 2.5
Wondering why is this difference! Any help will be much appreciated.