One of the paper titled "Rules of Thumb in Data Engineering" (Jim Gray et. el.) mentions some calculations based on Amdahl's balanced system law.
Initially, the paper provides some rules of thumb.
"10. Amdahl’s revised balanced system law: A system needs 8 MIPS/MBpsIO, but the instruction rate and IO rate must be measured on the relevant workload. (Sequential workloads tend to have low CPI (clocks per instruction), while random workloads tend to have higher CPI.)
Alpha (the MB/MIPS ratio) is rising from 1 to 4. This trend will likely continue.
Random IO’s happen about once each 50,000 instructions. Based on rule 10, sequential IOs are much larger and so the instructions per IO are much higher for sequential workloads."
Later, the paper provides following example.
"Amdahl’s balanced system law becomes more complex to interpret in the new world of quad-issue pipelined processors. Table 2 summarizes the following analysis. In theory, the current 550 MHz Intel processors are able to execute 2 billion instructions per second, so Amdahl’s IO law suggests that each 550 MHz processor needs 160 MBps of disk bandwidth (all numbers rounded). However, on real benchmarks, these processors demonstrate 1.2 clocks per instruction (CPI) on sequential workloads (TPC-D,H,R) and 2.2 clocks per instruction on random IO workloads (TPC-C, W) [7,8]. These larger CPIs translate to 450 MIPS on sequential and 260 MIPS on random workloads. In turn, Amdahl’s law says these processors need 60 MBps sequential IO bandwidth (~450/ 8) and 30 MBps random of IO bandwidth (~260/8) per cpu respectively (for tpcH and tpcC). A recent tpcH benchmark by HP  used eight 550 MHz processors with 176 disks. This translates to 22 disks per cpu, or about 70 MBps of raw disk bandwidth per cpu and 120 MBps of controller bandwidth per cpu (consistent with Amdahl’s prediction of 60MBps). Amdahl’s law predicts that system needs 30MBps of IO bandwidth. Using 8KB pages and 100 IO/s per disk implies 38 disks per processor – a number comparable to the 50 disks Dell actually used ."
I could not understand two parts of it (marked in bold). Need help to understand it.
1). How Amdahl's IO law suggests 160 MBps here (or is it 60MBps as indicated later (in bold))?
a. According to Amdahl's IO law, 50,000 instructions will need 1 IO (but of what size??)
b. Hence, 2 billion instructions (= 2 * 10^9 instrs = (50,000) * (40,000)) will need 40,000 IOs (but of what size?)
c. Should we multiply this 40,000 by 4 (because of quad-issue pipelined processor)? This will give 160,000 IOs.
d. Should we assume 1000 Bytes for each IO? If this is the case, it will give 160MBps!!
e. After this I am lost. Are my assumptions in (c) and (d) correct?Please help
2) How tpcH benchmark by HP translates to 70MBps of raw disk bandwidth per cpu and 120 MBps of controller bandwidth per cpu?
a. I could understand that if 176 disks are used with 8 processors, it is about 22 disks per cpu.
b. But, how this translates to 70MBps of raw disk bandwidth per cpu and 120MBps of controller bandwidth per cpu?