# How are logical addresses of instruction operands mapped to physical addresses?

Is address translation for all operands in single instruction done only once and then are all operands fetched continuously?

For example, consider any dummy instruction INSTR with two operatnds OP1 and OP2:

INSTR OP1, OP2


How does an operating system map logical addresses of these operands to their physical addresses? Is this address translation done only once for each instruction and then are all operands stored in consecutive memory locations? Or is address translation done separately for each operand and hence page tables are referenced for each operand separately?