I am reading a passage from the book Introduction To Embedded Systems, A Cyber-Physical Systems Approach, by Edward Ashford Lee & Sanjit Arunkumar Seshia and I cannot understand a pharagraph:

Determinacy: A state machine is said to be deterministic if, for each state, there is at most one transition enabled by each input value. The formal definition of an FSM given above ensures that it is deterministic, since update is a function, not a one-to-many mapping. The graphical notation with guards on the transitions,(*1) however, has no such constraint. Such a state machine will be deterministic only if the guards leaving each state are non-overlapping. Note that a deterministic state machine is determinate, meaning that given the same inputs it will always produce the same outputs. However, not every determinate state machine is deterministic.(*2)

I cannot understand the " guards on the transitions" and I cannot understand the difference between a "deterministic" state machine and a "determinate" state machine.


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