I am not from cse but trying to learn computer architecture on my own. Please clarify the following.

  1. In case of pipelining, each stage or subcomponent or subtask is assumed to be done in 1 CPU clock cycle time. Why is it so?

some operations may exceed 1 cpu clock cycle time. I am visualising pipelining as series of operations like assembly line in a factory.

  1. Micro-operation(phases of instruction) is also assumed to be performed in 1 cpu clock cycle. How is it possible? what if some task may exceed 1 cpu clock cycle time.

1 Answer 1


There are two possibilities:

  1. No operation is allowed to take longer than one clock cycle. If the designers of the CPU can't fit an operation into one clock cycle, then either the clock cycle must be made longer, or that operation must be split into two, or they designers work extra hard to make that operation faster. That's the more common way to do this.

(Obviously making the clock cycle longer is something that you really, really don't want to do.)

  1. We remove the assumption that every operation must be done in one clock cycle. If we encounter an operation that cannot be done in one cycle, then this operation stalls the pipeline. One clock cycle will be lost. This method may be used for operations that almost always run in one clock cycle, but in very very rare cases take longer. I remember the PowerPC 603 doing this when a floating point multiplication produced a result that was denormalised but not zero.

In your visualisation with an assembly line: If a worker figures out that he can't do his job fast enough then he presses a red button that stops the assembly line, finishes his job, then presses a green button to get the assembly line running.

  • $\begingroup$ sir nice explanation. KIndly also explaine me the following - why we always synhronize each subtask to only 1 clock cycle? (can 'nt we just leave to itself. What happens if it execution time is more or less than 1 clock cycle? ) $\endgroup$ Dec 8, 2019 at 13:06
  • $\begingroup$ Sir please explain...... $\endgroup$ Dec 9, 2019 at 1:00

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