In 'The Computer Organization and design book' it illustrates the call instruction as
- Decrementing the stack pointer by 4.
- saving the EIP+5 into the stack.
- Jumps to the new address specified.
What I know already is the instructions in this architecture are not typically all 4 byte in length, Hence.
How do we standardize the EIP to be added by 5 to the next instruction ?
normally in the MIPS architecture throughout the rest of the book the EIP is incremented by 4 which is intuitive as all the instructions are 32 bits.