# Memory Addressing - Alignment Clarification

I'm reading "Computer Architecture A Quantitative Approach" (5th edition) and I'm having a hard time understing this table:

I understand how Misalignment happens, i.e., some byte, half-word, word, or double word it's not a multiple of the address where the element is being stored or accessed. The part that I don't understand is that it says in the caption: "that the byte offsets that label the columns specify the low-order 3 bits of the address"

My question is why are the low-order 3 bits of the address important or relevant in this situation? I'm assuming that the low order bits are the lowest binary values in the address. My intuition is that the 3 low order bits can tell us if the address is a multiple(2,4, or 8) of whichever data is being accessed, but I'm not sure.

Let's take a sample address, written in binary: 110100100110.

Now let's compute it modulo 2, 4, 8, 16, writing the answer in binary:

• mod 2: 0
• mod 4: 10
• mod 8: 110
• mod 16: 0110

(I recommend checking this.)

Hopefully you can connect the dots now.

As an additional hint, let's do a decimal example: 987348957943 mod 100 = 43. Why? Since the $$i$$th digit from the right (counting from 0) is "worth" $$10^i$$, so all the digits other than the two on the far right are "worth" some multiple of 100.

• OK, so since 8 bytes(double word) is the maximum size that an element can be. the highest divisible number has to be 8 and to do that we just need to look at the last 3 remaining bits. Am I correct ? – Papaya-Automaton Apr 12 '20 at 2:32
• If we’re interested in the remainder upon division by 8, then this depends only on the final 3 bits. – Yuval Filmus Apr 12 '20 at 6:01