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Basically what I know is that 8086 can address up to 1 MB of locations which are divided in 4 segments(code, data, extra and stack) 64 KB each. But 64 KB * 4 is 256 KB, which doesn't add up to 1 MB(1024 KB). So what about the rest of space.

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    $\begingroup$ Sounds like a better fit for Retrocomputing. If you ask this question there, please remove it here to prevent duplicates. $\endgroup$ May 4 '20 at 16:54
  • $\begingroup$ Intel's use or the word segment gave the concept a bad name for a while. Coincidently, that was one of the reasons the iAPX 432/hardware supported capabilities didn't catch. $\endgroup$
    – greybeard
    May 4 '20 at 20:46
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The four segments you mentioned are not static - these are in fact registers that can point to any 64kb zone in the 1MB memory. By changing the value of these registers we can point to other fragments of the memory.

The exact computation of the effective address is performed using 2 registers: a segment register (CS,DS,SS,ES) and an offset register (usually BX, SI, DI, BP). Each one of those registers is 16bit. To get the 20bit effective address, the CPU performs EA = SEGMENT_REG * 10h + OFFSET_REG (mod 20bits). It is easy to see that by changing the SEGMENT_REG/OFFSET_REG (0000h-FFFFh), the above equation allows one to span the entire 1MB memory address space (00000h-FFFFFh).

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  • $\begingroup$ Why is the whole memory not divided into 4 segment completely? $\endgroup$ May 5 '20 at 12:09
  • $\begingroup$ Because this is how the 8086 works. The engineers of Intel in the 1970s could have chosen a different method, but this is how they decided to implement the access to the HUGE (at those times) memory space. $\endgroup$
    – Ran G.
    May 5 '20 at 19:18
  • $\begingroup$ The memory segments are of 64KB because the offset is 16 bits. Had it been 8 bits, the segment would have been 256 B or 2^8 B. $\endgroup$ Dec 17 '20 at 18:06
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The leftmost four bits of a segment register are used to extend 16-bit memory addresses, yielding 20-bit addresses. $2^{20}$ bytes is 1 MB.

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