# CPU Registers and Computation

How exactly does the control unit in the CPU retrieves data from registers? Does it retrieve bit by bit?

For example if I'm adding two numbers, A+B, how does the computation takes place in memory level?

Let’s say you have a processor with sixteen 32-bit registers and a unit that can add 32 bit integers. A very simplified way to add register x and register y and store the result in register z is this:

First, you build hardware that given a number x, can pick the first bit of register x and move it to the 1st bit of “operand1”. This is actually quite complicated because x could be one of 16 values, and the hardware must be capable to read the first bit of any of the 16 registers.

Second, you take this hardware and make 32 copies of it, one copy for each bit in a register. Now we have some quite complex hardware that can move 32 of 512 bits.

Third, we duplicate all of this with the appropriate changes to move register y to “operand2”.

Fourth, we build hardware that can add operand1 and operand2 and store the sum in a 32 bit location “output”

And fifth, we build the hardware that can take the value in “output” and store it into register z.

The CPU has direct access to registers. If A and B are already in the registers then the CPU can perform the addition directly (via the Arithmetic Logic Unit) and store the output in one of the registers. No access to memory is needed. However, you may want to move your data A and B from memory or the stack into the registers and vice-versa. These are separate operations.

Registers can be of different sizes 8 to 64 bits, this depends on your CPU architecture. On a x86-64 CPU registers are 64bit thus addition of two 64bit numbers is a single operation.

(CPU registers are considered part of the CPU more often than of memory. Strikingly, addressing is very different.)
The control unit does not generally access values from general purpose registers:
it controls feeding register values to, e.g., the ALU. By the word.
(There have been things like the DEC PDP-8/S or Motorola 14500.)

There is architecture ("logical" registers), and there is implementation, where register renaming abstracts logical registers from physical registers.
Two-operand instructions give rise to multiple read ports.
(Next, there is instruction-level parallelism, multiple write ports, too).

• (Tricks like these are guilty of keeping the register-starved x86 architecture around. Along with things like speculative execution, opening interesting cans of security worms.) Jun 28, 2020 at 8:49