# Cache Blocks Direct Mapping

If the main memory address has 18 bits (7 for tag,7 for line and 4 for word) and each word is 8 bits. I found that the main memory capacity is 256-KBytes, total cache lines is 128 line, total cache words is 128*16(16 word per block/line) = 2048 words. Then what will be the size of cache words? I am very confusing on it. I can't get the definition of cache words. Can anyone tell me what is the cache words? Thank you!

•  main memory address has […] and each word is 8 bits. what will be the size of cache words? […] I can't get the definition of cache words. I doubt there is a universal one: where do the numbers presented come from, what has that material have to say as to cache word size? (Unless otherwise provided, I'd assume same as processor word size. Especially considering GHz multi-chip 1st level caches would have multi-cycle access.) – greybeard Jul 3 at 5:36