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I'm reading Computer Organization and Design MIPS Edition 5th Edition The Hardware/Software Interface on how memory cache works. I came across the following paragraph on page 393;

The other key aspect of writes is what occurs on a write miss. We first fetch the words of the block from memory. After the block is fetched and placed into the cache, we can overwrite the word that caused the miss into the cache block. We also write the word to main memory using the full address.

I understand what a cache read miss is i.e. when the required word isn't present in the cache, but I'm having trouble understanding what a write miss is(how can we miss to write data?) and hence the subsequent paragraphs.

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My understanding is that a write-miss occurs when we want to write data to a location in main memory whose data is not currently in its corresponding cache block.

This is similar to a read miss: if the cache block that a memory location is mapped to does not contain the data of that memory location (indicated by differing tags), then some other memory location also mapped to that same cache block is currently present, and a miss occurs.

Similarly, we "miss" on a write if the memory location we want to write to isn't currently "in" its corresponding cache block, but rather, some other memory location's data currently occupies it.

The important question that follows a write-miss is "do we update the cache block corresponding to the memory location we just updated with that new data, or leave the old?" Perhaps the memory-location's data already occupying that cache block is more useful or being used more frequently than what we just wrote.

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There are several strategies for handling writes, most common are "write-thru" vs. "write-back" and "allocate on write" vs "non alloocate on write".

  • When a write access hits the cache, either only the cache is updated, this is "write back", or the write operation is forwarded to main memory, this is "write thru". Write back is more efficient, but more complex as data can be more up-to-date in the cache than in main memory, so coherency must be handled carefully.

  • When a write access misses the cache, either the write is directly forwarded to main memory, this is "don't allocate on write", or the cache line is read before doing the write access, this is "allocate on write", this is what is described in your book. Depending on system architecture, one mode can be more efficient than the other. Write-back tend to be associated with "allocate on write" though.

(When there are several levels of caches, L2,L3,L4...), each level can have different strategies on allocate/no allocate, write-thru/write-back, inclusive/exclusive, etc.)

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This is an old question, but I don't think any of the other answers quite explain what the text is saying.

A word is typically smaller than a cache line; a system might, for example, have words that are 8 bytes in size, but L1 cache lines that are 64 bytes in size. A write of a word means overwriting some portion of that cache line, not the whole cache line. Therefore, to perform such a write, you would typically need to load the rest of the 64-byte aligned line into cache, so that just the modified portion can be overwritten.

Another issue that the text doesn't mention, but is important in practice, is cache coherency.

On many multiprocessing architectures, memory semantics demands that every CPU sees every write occur in the same order. Those that have more relaxed semantics still need some kind of memory sequencing otherwise CPUs can't synchronise.

The upshot is that a CPU often must gain some kind of exclusive write access to a cache line before it is allowed to write. So even if a CPU has a copy of the cache line in its L1 cache, it may need to acquire that access, which is also a kind of write miss.

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Reading data is easy to understand: cache missed, then read it from memory. But writing data add more complexity: write the data to both cache(s) and memory or only cache(s)?

Write after missed

Write case 1

If the answer of ❸ and ❹ is yes, then you are using Write-through, else if the answer of ❸ is no but ❹ is yes, then you are using Write-back.

Why call it write-back? It is because the write to the backing store(cache2) is postponed until the modified content is about to be replaced by another cache block.

The idea is critical, please think it again and make sure you are understood.

It will write-back to cache2 when original block in cache1 is replaced by another cache block.

What's the side-effect after replaced by another cache block?

The answer is: write missed.

How to handle write-missed?

how write-missed happened

As you can see, after the replacement(❶) (if you are using write-back strategy than it will trigger write-back(❷)) next time processor try to write new data(k1 -> x2), it realized that the data is dirty and start making decision to handle this situation.

There have two main strategy to handle this: write-allocate and no-write allocate which is answered by @TEMLIB.


As you can see, when implement the write-back strategy, there is stale value in the cache2, how to avoid this situation?

As @Pseudonym answered, communication protocols between the cache managers which keep the data consistent are known as coherency protocols.

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When system copies a data from the lower level to cache, it also copies the memory location address. Therefore, each location in cache represents the location memory in the lower level of the memory hierarchy. When an instruction tries to write to the memory, it specifies the full address of the destination. You cannot write to the cache the data destinated to the memory address that is not related to any location in cache. This is when the write miss happens.

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  • $\begingroup$ what do you mean by "memory address not related to any location in cache"? The book describes direct mapped cache in the previous sections and in that case we write to the cache by using certain bits of address for indexing and the remaining as a tag. Data can always be written to the location := (block address) mod (number of cache blocks). $\endgroup$
    – Jamāl
    Dec 15, 2020 at 3:31
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From my understanding, there are two things to consider while writing a cache : one is cache index which is implicit and other is tag which is explicit. When we want to write to cache, we have a full memory address in which we want to write the block. Firstly, from the memory address we calculate the index of the cache. We go to that index and check the tag of that index. We also have to calculate tag from the memory address (in which the block should be written) along with cache index. If the calculated tag is not equal to the found tag on the cache index then a 'write miss' has occurred.

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There are Two types of writes either to update exist track or to write a new track. For the new tracks not meant for Cache hit miss the cache hit miss is for updating existing tracks, So if the Track is existing in the Cache and the updated happened in the Cache That's mean a successful Write Hit. If the Track doesn't exist in the cache and it will be fetched from disk then updated in the cache that's mean Write miss.

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