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Wikipedia says stack machine “designs have though been routinely outperformed by the traditional register machine systems, and have remained a niche player in the market.” Why is this?

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    $\begingroup$ Have you read the section Performance disadvantages of stack machines in the Wikipedia article? $\endgroup$ Jan 24 at 22:01
  • $\begingroup$ (When the Novix N4016 hit the market, its speed compared favourably to competitors. I put that to a) being new b) a "dual access memory interface", costing pins&power, increasing component and, more importantly, system cost.) $\endgroup$
    – greybeard
    Jan 25 at 13:59
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I think the prime reason why register machines are better at performance because registers are within the CPU chip itself, however stack is generally the part of main memory, accessing register is on average 1-3 clock cycles, level 1 cache requires nearly 10-20 cycles on average, and depending on the design it could have level 2 shared cache which takes about 40 cycles on average, finally main memory takes 100s of cycles in comparison per initial word access then once you access it, the further block containing the required word is only incrementally cycle consuming. Hence register based architecture should always out perform stack based.

The data presented is definitely not according to today's state of the art processors take it from more of a conceptual stand point rather than practical one, and that I believe was the intent of the question.

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  • $\begingroup$ accessing [a CPU] register is on average 5-10 clock cycles - can you substantiate this? $\endgroup$
    – greybeard
    Jan 25 at 9:55
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    $\begingroup$ Any modern CPU can access a CPU register in a single clock cycle, and do something useful with it to boot. Increasing the Instructions Per Clock is how CPU's got faster in the last decade, even though CPU frequencies have hovered around the 3 Ghz mark. $\endgroup$
    – MSalters
    Jan 25 at 11:02
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Stack machines have a specialized hardware architecture, which is ideal for some problems. For the vast majority of algorithms, it's not optimal. For instance, take sorting. With random access, sorting is ideally done with a variation of the common quicksort algorithm. With a single stack, you have a problem even sorting the stack - the vast majority of input permutations can't even be sorted!

Now real-world stack machines are a bit more flexible, but as soon as you design an architecture that allows O(1) access to the top N values of the stack, it starts to morph into an N-register CPU. Sure, you get some fancy register shuffling as the stack is pushed and popped, but modern register-oriented CPU's can do far more flexible register renaming. on the fly.

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