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I was reading about paging in OS , and one of the things I saw was the page table base register (PTBR).

If the CPU generates a logical address (Consists of Page number + Offset) it needs to be mapped to Physical address (Consists of Frame number + Offset).

In the mapping process there must be first a lookup in the Page table of the process to get the Frame corresponding to that page.

Now to get to the page table we need to get the location of the page table of that process in the main memory.

The starting location of the page table is stored in a register called page table base register (PTBR).

Now the page number part of the logical address is added with the value in the PTBR and the corresponding frame is found in the table as the following:

PTBR

Since the PTBR stores the base physical address of the page table in memory (e.g. 14000), and the logical address contains the page number that the CPU wants to read data from. Now here is my question:

Is the page number part of the logical address is the starting address of the page?

For example: the virtual address is 16 bit and the size of each page is 1KB

page 0 --->starts at virtual address 0

page 1 --->starts at virtual address 1024

page 2 --->Starts at virtual address 2048

and so on ...

So if the CPU wants to read data from page 1, then the page number is "1024" and then this value is added to the value in the PTBR?

OR

The page number itself is added for example: if the CPU wants to read data from "page 1", then the number "1" represents the Page number value and when it is added to PTBR value? in other way does the CPU deal with page Number or Starting address?

I know this is silly for a lot of you, but it really got me confused because I couldn't find any real example about it.

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I'll take x86 32 bits PCs as an example. On 32 bits x86 PCs, the CR3 register is used as the PTBR. The CR3 register contains the 4KB aligned address of the page directory. The page directory contains addresses of the different page tables. The x86 processors have virtual addresses which are separated in 3 parts. The 10 most significant bits are the offset in the page directory, the 10 bits in the middle are the offset in the page table and the 12 last bits (to the right) is the offset in the physical page in RAM. Let's look at an example. Let's take address 0x12345678. This is a 32 bits address which translates in binary to 0001 0010 0011 0100 0101 0110 0111 1000. Now let's look at the different parts of this address.

Page directory offset        Page table offset        Physical page offset
   00 0100 1000                11 0100 0101             0110 0111 1000

So in the end this virtual address will translate to page directory entry 0b0001001000 = 0x72 = 114 decimal, page table entry 0b1101000101 = 0x345 = 837 decimal and the offset in the physical page will be 0b011001111000 = 0x678 = 1656 decimal

Depending on what is the content of each selected entries by this virtual address, the actual physical address can be anywhere in RAM. In this example we have entry 114 in the page directory. If at entry 114 is written 0x1234, the MMU of the CPU will look there for the page table. It will use address 0x1234 as the bottom of the page table and then find entry 837 which could contain 0x12345. So the final physical address translated will be 0x12345 + offset_in_physical_page = 0x12345 + 0x678 = 0x129BD. This will be the final physical address once translated using the example that we have here.

On more modern processors you will have 4 levels of page tables so the virtual address will be split in 5 parts. 4 parts of 9 bits to the left and 1 part of 12 bits. Only 48 bits are used for now with the leftover bits to be used later (once there are more page table levels).

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