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As we all know, when a given thread/process reaches a memory address it does not have cached, the execution will (for the most part) freeze up until said data is fetched from memory. What I don't understand, is why in multithreaded systems, we can't save ourselves the headache of data-oriented design. Why can't the processor/OS simply do work elsewhere on a different thread until the data is received?

I couldn't find a good post on this exact question, and this may just be obvious to others. I only know so much about the pipeline and such so there could be a very obvious reason for this, I simply don't know why.

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Ask yourself: How long does it take to load data from memory, and how long does it take to stop one thread from running and start another thread? Starting another thread would usually take a lot longer, plus a new thread would have the exact same problem, having to wait for data to be ready.

An exception is hyperthreading cores. A hyperthreading core can officially run two threads simultaneously, but doesn’t actually have twice the processing power of a normal core, so it cannot actually perform twice as many instructions or anywhere near that. Such a core can however process operations of the second thread immediately when the first thread cannot proceed for any reason.

Now it’s debatable if hyperthreading is actually a win, especially since it gives hackers ways that operations in one thread can very subtly affect operations in another thread, leading to massive security problems. As a result, many high-performance ARM processors don’t implement hyperthreading at all.

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  • $\begingroup$ A modern hyper threaded core can truly execute instructions from a single or multiple instruction streams in parallel. $\endgroup$
    – pveentjer
    Jul 18 at 9:13
  • $\begingroup$ The focus of using hyper threads is to have a large enough set of instructions to pick from so that the CPU can run these instructions in parallel. E.g. modern processors are super scalar meaning that they have multiple executions units e.g. multiple ALU's that can be used for the parallel execution of instructions. They can be used to process instructions from the same instruction stream but also from multiple instruction streams. $\endgroup$
    – pveentjer
    Jul 18 at 9:17
  • $\begingroup$ One problem of X86 is the decoding complexities of the X86 instruction set due to its variable length and hyper threads are a way to keep this window filled. ARM doesn't have that problem because its instruction set is a lot easier. So it is easier to have a huge window of instructions from a single instruction stream instead of needing to use multiple instruction streams. E.g. the window (ROB) on the Apple M1 is like 630 while intels have a window of 200/300 instructions. $\endgroup$
    – pveentjer
    Jul 18 at 9:20

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