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I know that the offset is based off of the line size for a cache. I have seen the example: "32-btye line size would use the last 5-bits (i.e. 25) off the address as the offset into the line" but I do not understand the process used to determine this.

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If you need to address a space consisting of $2^N$ values, then you need $N$ address bits.

In your example, $2^N = 32$ and $N = 5$.

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