The number of registers and their width is not really related, they just happen to be the same in MIPS-32. You can look at other ISAs for different combinations of register width/number:
- IA64: 128 64-bit registers
- SPARC: 32 32-bit or 64-bit registers
- 6502: 3(?) 8-bit registers
- x64: 16 64-bit registers
If I would want 128 registers instead of 32 registers, would I have to increase the width of each register to 128 bit as well?
You would need to widen instructions (or change the instruction format without widening the whole instruction) to widen the operand fields, or add some other feature that enables using 128 registers (hypothetically you could have an ISA that "has" 128 registers but can only ever access 32 of them, but doesn't that just mean that it really has 32 registers?). The obvious way is having 7 bits per operand, but there are different ways to do it, such as using "register windows".