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I have a question related to the hardware protection needed to implement an operating system kernel:

Identify at least three hardware level mechanisms that are necessary to protect an operating system kernel from malicious or erroneous user programs.

I can't work out what that would be from the Wikipedia article.

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The answer is actually none. This is not what your teacher expects in this homework assignment, but it's true.

The problem in process isolation is to protect against processes that try to access resources that they should not (resources that are used by other programs or by the operating system itself). Resources include memory and peripheral devices.

You can design an operating system that verifies all programs before running them, and only runs a program if it can prove to its satisfaction that the program will never attempt to access a resource that it is not allowed to access. Such operating systems are not very common, but they exist, for example some smartcards running Java Card work like this: only Java bytecode applications can be installed on the card, and they have to have been checked and passed by a bytecode verifier.

That being said, most operating systems enforce process isolation by leveraging hardware means. The most important part is the memory protection unit: a hardware component that assigns privilege levels to blocks of memory and ensures that only programs with the appropriate privilege level can access each block. Often memory protection is performed by a memory management unit which combines protection with virtual memory management, but the indirection afforded by virtual memory is not necessary for the protection aspect. There are processors with an MPU but no MMU. The uClinux project is an example of operating system which enforces process isolation and runs on processors with only an MPU.

In order to be of any use, the MPU has to be combined with some mechanism that assigns privilege levels to programs. Most CPU types that allow privilege isolation have at least two modes (sometimes more), which I'll call kernel and user, with kernel being the most privileged. At any time, the CPU is in one mode or the other. The CPU boots in kernel mode. Switching into kernel mode from user mode always causes a jump to a fixed address. That way, the initial program that is loaded at boot time remains in control of what can be executed in kernel mode. It is up to that program to set up the MPU/MMU so that other programs cannot overwrite kernel code or access peripherals directly, thus enforcing isolation between kernel code and user code. The kernel is also responsible for changing MPU/MMU settings when switching between programs so that programs can only access their own memory and not other programs'.

That's two mechanism. I don't know what your teacher had in mind for the third one.

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  • $\begingroup$ My (wild) guess would be: 1) a mechanism to restrict access to privileged resources (in most architectures this includes special purpose registers), 2) a mechanism to gain privilege in a restricted way (Itanium's EPC instruction shows that this need not require a fixed address), and 3) a mechanism to drop privilege. You combined 2 and 3. $\endgroup$ – Paul A. Clayton Sep 24 '13 at 23:01
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Hardware level protections is through following mechanisms in OS: 1) Dual mode operation: This is the basis of all the protections. All the process operations are performed through either User mode or Kernel mode. User mode is the one in which execution is done on behalf of a user And Kernel/monitor mode is the one in which execution is done on behalf of operating system. So basically all the privileged operations are performed in Kernel mode. 2) I/O protection: All the input/output operations are privileged instructions and hence are done in kernel mode. OS must ensure that application prog which is part of user mode does not get control of computer in Kernel mode. 3) Memory protection: User mode should be given access to only those memory locations for which they are allowed. It is achieved by having atleast two registers viz. Base register: It stores the starting physical address of the allowed memory location Limit register: It stores the size of the range. So whenever CPU asks for the memory location access by giving its access, it is checked if it falls between Base address and Base+Limit address. In kernel mode OS has access to all the memory locations including kernel and user memory. Loading of base and limit registers is again a privileged instruction and hence done in Kernel mode. 4) CPU protection: It is achieved through a timer which is decremented with every clock tick. When timer reaches 0, interrupt occurs and current process execution is suspended by CPU. It is used to implement time sharing, also used for computing current time. Loading of this timer is privileged instruction and hence done in kernel mode.

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