I'm stuck on this question if I could get some help?
Calculate the effective CPI (taking into account both instruction execution and memory access) for the following unified instruction and data cache. Instruction execution CPI = 1.0 Percent of instructions that are loads or stores = 33% Cycles to access main memory = 100 Cycles to access cache = 2 Miss rate for cache 2.0%
a. What is the total memory access rate? (memory accesses per cycle)
b. How many cycles per instruction are spent handling misses?
c. How many cycles per instruction are spent handling hits?
d. What is the effective CPI for the system with the cache?
What I've thought of:
a. Well, we have 33% loads and stores and 2% of them are misses. Does that mean we access the memory 2% of the time?
d. Completely stuck here and I'm not sure how correct I am on the above