How are instructions from software sent to digital circuit in cpu?

Question

I am studying computer architecture in my university and there is something that's troubling me. I get the bigger picture of how instructions are executed in the fetch - execute cycle and the complete process of a program being read by the compiler and then into machine code....

In my Digital Logic Design class I have used gates and ICs which require a high or low voltage to work. But since it was just hardware, the input was provided using switches / batteries. What I cant grasp is how does a piece of software provide the same "high / low" input to the cpu for the computation to be done.

For example, I make a program which just saves a number "10" in my RAM when I click a button on screen. After it is decoded to machine code, how are the electrical signals sent to the memory cells in RAM to store data? I have tried reading answers here but they weren't really satisfactory.

I would be really thankful if anyone could give a detailed overview using an example and not mark this as duplicate.

Thanks!

Answer 1

A computer program is after all just a sequence of bits.

Each bit that composes the program has this "high voltage" / "low voltage" information, similarly to how your "switch and battery" input system worked.

What might be confusing here is that it seems like a "closed loop" - the inputs are digital bits, but where did they come from? The output of a logical circuit. But where did its inputs come from? Again, from the storage in the computer. And this cycle continues...

In reality, this of course doesn't go forever. The inital values for the bits in the storage of the computer are literally hard-coded by hand. For example, the bios is a hard-coded instruction list that determines how to start running the rest of your computer when you click on the "power on" button on your computer.

Answer 2

All software executed by a hardware processor is a sequence of machine-code instructions. Each instruction contains an opcode which stands for operation code. The opcode is an nonnegative integer prefix‡ that identifies which operation to perform and how zero, one, or two (or more rarely more) parameters that the operation takes. Some operations (and thus opcodes) are the familiar integer arithmetic operations: add, subtract, multiply, and divide. Other operations (and thus opcodes) are the familiar floating-point arithmetic operations: add, subtract, multiply, and divide. Still more operations are the familiar bitwise logic operators: bitwise inclusive or, bitwise exclusive or, bitwise and, and bitwise not/inversion. Other operations are branching instructions that you'd think of as either goto or conditional-goto but to an integer offset forward or backward adjustments to the current instruction's address. Still other operations are for accessing memory, especially on RISC processors where accessing memory is practically never performed within the arithmetic or bitwise-logic operations.

‡ VLIW architectures are effectively multi-way infix of a sort with an opcode prefix embedded into the infixed multiple instruction-bundle, but that is too advanced for this basic introduction.

The nonnegative integer of the opcode is where you will find a sequence of ones and zeros arranged into powers of 2 from 0 upward. Each integer parameter is either always a nonnegative integer or sometimes negative or sometimes positive. This latter form is represented in the modern era via what is called twos-complement numerals where the negative numbers “wrap around” so that –1 is all-bits-one such as 0xFF in a twos-complement 8-bit numeral, with –2 as 0xFE and so forth decrementing. This also is where you will see the zeros and the ones appearing as powers of 2.

All software is a sequence of instructions where the address of the current instruction being executed is pointed to by the program-counter register (a.k.a. instruction-pointer register on Intel). Branching is performed by adding or subtracting offsets to this program-counter register for loops and if-else constructs and the like, to point to a new instruction to execute next that is non-sequential after the branch instruction.