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Using IEEE 754 algorithm i assume, that it can be implemented in a branchless way.

But how does CPU determine special cases (Reserved Exponent values):

Exponent Significand is
11111111 000000000... Inf
11111111 000001000... NaN
00000000 000000000... 0
00000000 000001000... Subnormal

Without any tricks which i don't know / understand it should be expensive.

EDIT

It was too big for comment, so editing source question:

I'm currently reading ARM spec/documentation https://developer.arm.com/documentation/ddi0403/d/Application-Level-Architecture/Application-Level-Programmers--Model/The-optional-Floating-point-extension/Floating-point-data-types-and-arithmetic?lang=en#BEIBFIBJ and especially interesting part is FPUnpack() pseudocode. If i understand correctly, CPU doesn't have intrinsics / instructions for special cases, but the compiler, that produce machine code should consider to validate result from registers (FVP for old ones and NEON for new). The example i found from ARM team https://github.com/ARM-software/ComputeLibrary/blob/8f587de9214dbc3aee4ff4eeb2ede66747769b19/include/CL/cl_half.h#L135. Am i right ?

EDIT:

Nope, i'm not right, according to this answer https://stackoverflow.com/questions/61646510/how-does-the-cpu-cast-a-floating-point-x87-i-think-value.
But it's still the question how does CPU registers handle special cases...

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Not really. There are eight bits to check in two numbers usually to see there is a special case. For infinity/NaN you don’t need to do the normal operation anymore, so the rest is not time critical. More time critical is normalising the mantissa for a zero exponent.

But there are processors that assumed these cases are so rare that many can be handled by an interrupt (not directly in hardware, but by executing code).

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