# How to determine the maximum RAM capacity for an operating system?

I was curious to know what limits the max RAM capacity for an OS while reading about microprocessors being 32-bit and 64-bit. I know that limit for 32-bit OS is 4GB and for 64-bit OS is 16 Exabytes, but my question is how do we get there? I found this calculation:

$\qquad 2^{32} = 4\,294\,967\,296$

and

$\qquad \frac{4\,294\,967\,296}{1024 \cdot 1024}\,\mathrm{B} = 4\,096\, \mathrm{MB} = 4\, \mathrm{GB}$.

It's different for 64-bit:

$\qquad 2^{64} = 18\,446\,744\,073\,709\,551\,616$

and

$\qquad \frac{18\,446\,744\,073\,709\,551\,616}{1024 \cdot 1024}\mathrm{B} = 16\,\mathrm{EB}$.

What I don't understand is how the calculation of bits turned into bytes and reached the results 4GB and 16EXB?

• There are $2^{32}$ addresses, but how much do you store at each address? – Raphael Jan 10 '14 at 9:34
• @Raphael-Yes thats the key question. How many bytes can we store at one memory address out of the 4,294,967,296 addresses we have. If the answer is ONE then it makes perfect sense as it means 4,294,967,296 bytes can be stored at as many addresses which is equal to 4 GB in case of a 32-bit OS. – Neeraj Jan 10 '14 at 11:06
• In many ways, that's an arbitrary design decision. Yuval's answer gives you the common case. – Raphael Jan 10 '14 at 11:28

The calculation is in bytes since the memory is addressed in units of bytes. If a machine word is $N$ bits and an addressed is stored in a register whose size is a single machine word, then you can address $2^N$ different locations, each of which is a byte (in principle, that could depend on the CPU, but I'm not aware of any CPU which addresses its memory in larger words). However, more complicated addressing mechanisms can be used to address more memory. For example, pointers could take up more than a machine word, or segments could be applied (as in 80386 and its successors).

• Originally, a byte was the amount of memory required to hold a single character and this was normally the size of an addressable memory location. In the 1950s-60s, there was no standard size for a byte and different computers used different sizes; this is why the term "octet" came about to describe an eight-bit quantity. 8-bit bytes were standard by the 1980s and we seem to have stuck with that, even though things like Unicode require more than one byte per character. – David Richerby Jan 10 '14 at 9:41
• Apart from memory-mapped I/O, it's possible to do away with byte and "small" word addressing on modern CPUs, since all memory operations are performed on cache lines, not bytes. Any byte operation can be emulated by a series of shifts, masks, logical operations and sign extension. Some RISC chips went down that route before programmers complained about it and the designers added byte addressing as an instruction set extension. The most recent example that I'm aware of is the DEC Alpha, which didn't support byte addressing until the 21164A. – Pseudonym Sep 28 '15 at 0:25
1. First of all, in computer architecture, 32-bit/64-bit computing is the use of processors that have datapath widths, integer size, and memory addresses widths of 32/64 bits (four/eight octets). Also, 32-bit/64-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size(due to design decisions that may differ in different CPU/OS).

2. Secondly, there is a confusion that is created when calculating the maximum RAM capacity for 32/64 bit OS/microprocessor. The 32-bit/64-bit address/machine word is usually considered as containing a single byte word and not byte (e.g a byte word might be a floating point number of 32/64 bits depending on the architecture & a byte on the other hand is 8 bits) but since we do all our memory calculations in terms of bytes the result her too is in terms of bytes. Hence, bytes is the unit written where

1byte = 1 byteword = 1 address space/machine word

So if we have 4,294,967,296 addresses that means we can address as much byte words and hence the total capacity of RAM in a 32-bit OS is 4GB, similarily for 64-bit OS the calculations are of addresses with one byteword each and later written in terms of bytes.

I hope this should make it pretty clear. Thank you for your inputs and replies.

The simple answer that 32bits CPUs can address $2^{32}$ bytes and 64bits CPUs can address $2^{64}$ bytes is quite right, but, one can find some exceptions, or refine the explanation.

CPUs with MMUs manage separate virtual and physical address spaces. They can have different sizes. The 32bits or 64bits designation is about the virtual space : Applications have 32bits or 64bits pointers.

The physical address space can be smaller or larger than the virtual address space :

• In some 32bits x86, starting from the PentiumPro, a larger, 36bits physical address space (=64GB) can be available : Several tasks, each occupying up to 4GB can be simultaneously running on the CPU. The OS must manage a global address space larger than the user software space (and OS writers really hate that, because the OS needs to constantly swap mappings for accessing all the memory). 32bits SPARCs had a similar mechanism.
• In current 64bits x86, the quantity of physical memory that can be really managed is smaller, IIRC 48bits, because 16EXB is too large, for now.

### TL;DR

Q: How to determine the maximum RAM capacity for an operating system?

A: Look into the OS documentation (really).

### Let’s dissect

• I know that limit for 32-bit OS is 4 GB and for 64-bit OS is 16 Exabytes, but my question is how do we get there?

Now we are speaking about flat address space (i.e. how many different addresses a program can distinguish). If such a program is using 32 bit (64 bit) pointers, there are 2³² (2⁶⁴) different addresses. Assuming each of these positions can accommodate 1 byte, we have 4 GB (16 EB) of allocable capacity. This also answers the last question:

What I don't understand is how the calculation of bits turned into bytes and reached the results 4GB and 16EXB?

• OP refers to 32-bit and 64-bit microprocessors in the first sentence. We need to understand that this reference is to the internal architecture. To illustrate how important is to define topic of discussion let’s have a look at Intel 80386SX CPU:

• Its architecture is 32 bits,
• data bus width is 16 bits,
• address bus width is 24 bits.

While this is 32-bit CPU, it can address only 16 MiB of RAM and it needs two CPU cycles to move a word between a register and the RAM (more examples).

So why the size of address bus does not always match the size of machine word? Because the CPU needs to address reasonable amount of RAM. Having 8 bit wide address bus on 8-bit CPU would allow for only 256 B of memory. OTOH, having 64 bit wide address bus on 64-bit CPU is not feasible because there is no real demand nor HW available for such a setup, yet it would increase complexity of memory subsystem considerably. What reasonable is comes from engineering and business decision made at given time.

There’s related discussion at SO.

• @D.W. Now I can see the source of confusion. I was trying to answer How to determine the maximum RAM capacity for an operating system? question while the text of the question actually shifts toward your interpretation. While I believe such an amount cannot be securely calculated, I hope the expanded text fits the answer category now. – Mr. Tao Aug 25 '17 at 11:44

The first question is: How much RAM can the hardware support? For example, if there are n bits transferred between CPU and RAM on every access, and the CPU has k address lines, then the CPU can access $2^k·n$ bits, or $2^k·n/8$ bytes.

However, the CPU must address things other than RAM, for example video memory, memory-mapped IO, ROM, and so on. So you need to add up these things to get the maximum usable amount of RAM. And it depends on both the CPU and memory hardware how much is actually usable. For example, if the address lines are enough for 64GB, and other hardware requires 2GB addressable space, then depending on the hardware, only 32GB, or 48GB, or 56GB RAM might be usable, but most likely not 62GB.

The next level is how much RAM the firmware of the computer can recognise. The computer doesn't know how much RAM there is when it is turned on, it must recognise that RAM. That's usually done by software firmly built into the computer. And that software might only be able to recognise say 16GB of RAM. (This often happens with old computers, where no memory chips for more than 16GB were available when the computer was sold, and newer, bigger memory chips cannot be recognised).

So that is all before the operating system comes into play. Usually the OS doesn't have any limitations itself. Sure, it requires more memory for page tables etc. if there is more RAM, but then it has more RAM available to hold page tables because it has more RAM. There are cases where the maker of the OS has a "home version" and a "professional version" of the OS, and the "home version" of the OS may be artifically restricted.

Or the OS may have decided to use quite arbitrarily only a small number of bits for the index of a RAM page in some data structure, for example. If the OS uses only 24 bits to store the index of a RAM page, and a RAM page is 4KB, then that OS can only handle 64 GB of RAM. Which is quite possible for an OS written twenty years ago, when someone might have thought "nobody will ever have more than 64GB of RAM". (I remember a computer that could hold up to 1.5GB of RAM, and the RAM was four times more expensive than the rest of the computer).