8
$\begingroup$

Seemingly, a byte has established itself to be 8bit (is that correct?). RAM and NOR-flash can be normally accessed on a quite granular level, but it is up to the system architecture to determine if the smallest addressable unit is 8bit, 16bit or any other power of two bit number. Would the correct terminology be to call this word-addressable? Or asked differently, is a word the size of smallest addressable unit? Or is there some other term to describe this?

Are mabye nibble, byte, word, double word all variable in bit-length and only defined by the architecture? And it is therefore only coincidence that a byte is always 8 bit? E.g. someone could design some new CPU and memory type and define her byte to be 16bit?

Main question: What is the precise term for the smallest addressable memory block?

Side question: What is the antonym to this word I'm looking for (e.g. used in NAND-flash)? Page-addressable, block-addressable? Are both correct or is one inprecise?

$\endgroup$
9
$\begingroup$

From a computer architecture point of view, and with the caveat that nomenclature sometimes varies, especially when there is a family of related architectures which has evolved for a long time, or when the marketing department decides to that the usual terms have to used in another way (either to put the product in better light by using a bigger number, or to have a simple number to differentiate more or less related products).

A word has the size normally used for integer operations (often expressed as size of the integer or the general purpose registers, i.e. not address or data, internal or external buses, not address registers, not index registers). A common issue is that when an architecture is an evolution of a previous one, one often keep the term word for the initial size and one use "double word" or "quad word" for what is a word if you look at the architecture in isolation. Historically words have not always been a power of two (I know of sizes: 12, 16, 18, 24, 32, 36, 60, 64 and I don't think my knowledge is exhaustive).

Word addressable means that the memory is considered as arrays of words, and thus no smaller unit has an individual addresses.

A byte has various definitions. The term was introduced to mean the unit used in character encoding at a time where multi-byte encoding didn't exist. It is often used to means the smallest addressable unit for machine which are not word addressable (well as long at it is not one bit). I don't think those two definitions have ever given a different size. (nor a size different from 6 or 8 bits). For word addressable machine it often means some unit smaller than a word that the machine has some support for (for instance the PDP-10 -- a 36 bits word addressable computer -- had byte instructions which could manipulate any size from 1 to 35 or 36 bits). Nowadays it is also often 8 bits. Often several of those definitions are practically equivalent.

Byte addressable characterizes machines where the memory is considered as arrays of bytes in one of the above meaning.

AFAIK nibble has only been used for 4 bits quantities.

E.g. someone could design some new CPU and memory type and define her byte to be 16bit?

Yes, but I'm not sure if it would make much sense to do so if one keeps the CA usage to use byte for something smaller than the word. Having a word addressable 16-bit processor with no support for something smaller than a word may be a good choice for a special purpose processor.

Secondarily, what is the antonym to this word I'm looking for? Page-addressable, block-addressable?

Bit-addressable, byte-addressable and word-addressable are the only terms I've seen use. It doesn't make much sense to address only units bigger than the word at the architectural level. Word-addressable is nowadays only used for special purpose processors such as DSP. I don't think bit-addressability has been used for anything else than special purpose one excepted the IBM Stretch.

About your new main question

What is the precise term for the smallest addressable memory block?

I know of none used in Computer Architecture (byte has been used for something smaller in word adressable machines), but is the definition used by C for byte.

$\endgroup$
  • $\begingroup$ Thanks for the elaborate answer. As I reread my question I noticed I was a bit vague, therefore I'm still looking for a definite answer that you could maybe still add to your answer: What is the precise term for the smallest addressable memory block? Or is there none? Furthermore, I changed the sentence that you quoted. Thanks so much. $\endgroup$ – Franz Kafka Jan 20 '14 at 14:46
  • 1
    $\begingroup$ Bit-banding regions on some microcontroller ISAs might count as bit addressing. A portion of the address space translates word addresses (at least in ARM Cortex-M) to bit addresses. Obviously this only supports bit-addressing for a small portion of the total address space (only 2MiB out of 4GiB for Cortex-M3). Also instruction set addressability is distinct from hardware addressability (e.g., NAND flash is page addressable, DRAM is often addressable at cache block granularity, L1 cache is typically maximum load size addressable [with smaller writes ECC requires RMW].) $\endgroup$ – Paul A. Clayton Jan 20 '14 at 15:40
  • $\begingroup$ @PaulA.Clayton I didn't knew the term bit banding but I knew of the 8051 which provides it as well. I'd not consider an ISA which provides it as bit-addressable no more than I consider the PDP-10 as byte-addressable, it seems too distinct of usual datapath. $\endgroup$ – AProgrammer Jan 20 '14 at 15:53
  • $\begingroup$ @AProgrammer I am not certain how I would define ISA addressability. Defining such according to the smallest unit of external addressing supported in a single instruction gives a different answer than defining such according to the unit of addressability of an "ordinary address/pointer" (which excludes bit-banding and address/pointer-and-finer-grained-offset mechanisms). The latter (which you chose) seems more natural in some contexts, but the former might make sense in other contexts. Atomicity (wrt interrupts or wrt cache coherence) might also be considered (instructions can be non-atomic). $\endgroup$ – Paul A. Clayton Jan 20 '14 at 16:28
  • 1
    $\begingroup$ @PaulA.Clayton, I tried to stick to what seemed established practice in the field, but it is a field which loves intermediate states and I've neither Andy Glew's talent nor culture to be able to give an exhaustive yet understandable description. $\endgroup$ – AProgrammer Jan 20 '14 at 16:35
1
$\begingroup$

The Burroughs B1700 was bit addressable (actually the address referred to the space between the bits from which you could read forward or backward an arbitrary number of bits). (So it was not only IBM's Stretch, which was a failure.)

The B1700 was designed to be the most flexible machine. Applications were not meant to be written at the bit level, but different environments built for different application styles. These environments were programmed in microcode, providing the virtual machine engines. Each language (systems SDL for OS, COBOL for business, FORTRAN for COBOL) runtime was written as a separate microcoded environment. Thus the architecture could be tailored to any future application styles.

Wayne Wilner, one of the designers, made the point that other machines of the time forced programmers to lie in the Procrustean bed of fixed-sized bytes and words. Really what each runtime environment required was data structures that suited the application. Unfortunately, most current machine architectures are still Procrustean (and thus programmed in languages like C that expose this machine structure, rather than supporting problem-oriented structures).

Further readings on this fascinating machine and its philosophy are available at:

http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.590.2624&rep=rep1&type=pdf

and in more detail:

http://ianjoyner.name/Files/Wilner.pdf

So why is the B1700 no longer made?

Burroughs had three main ranges of computers, the large systems B5000-B7000 (ALGOL architecture), medium systems B2000-B4000 (COBOL architecture), and small systems B1000 (anything-you-like architecture).

The large systems were really expensive, until the B5900 which was microcoded on a cheap processor to provide the ALGOL stack machine. Jack Allweis, the designer of the B5900 has pointed out that the large system architecture thus scaled down into small computers, but the B1700 was designed to be cheap and did not scale up.

Thus the B1700 to B1900, while very successful at the time, died for commercial reasons.

Burroughs large systems are still available as Unisys ClearPath MCP and even runs on your PC as an emulation.

As another footnote, IPC on the B1700 was a pain between different virtual machines, but very secure (like today's microkernels). The large systems all ran processes in the same environment where data could be shared in a secure way, but IPC was direct. This is somewhat between microkernel architectures (Mach) and non-kernel (Linux). However, the B5000 is a very secure machine, but also performs well.

Security is the biggest problem in the industry now, and really these machines should be revived and studied to show the way forward.

$\endgroup$
1
$\begingroup$

Main question: What is the precise term for the smallest addressable memory block?

I'll add another answer to address that in a different way. In electronic hardware, we call it the bit - binary digit. That is an entity that can represent any two values. We usually think in terms of 0 and 1, but it could be 3 or 4, 365 or 266, -3 or -4, even 25 or 37.

Any signalling system can be used to represent these values - flag up, flag down, eyes open, eyes closed, +5v, -5v. That is not important.

What is important is that philosophically we are representing the smallest distinguishing amount of information. This could be on, off, or true, false, or up, down, or 0, 1 - anything that distinguishes two separate states. We can map these values onto any of the above signalling systems and many others.

Now the question is, how can we test and set such a small amount of information individually? As I said in previous answer, the B1700 chose to address that smallest amount of information directly.

However, most machines decided to only address larger amounts of information. Let's consider a group of four bits with a single address. So if we get the value of 1011 in our location, how do we test the second bit from the left. We use a mask: 1011 and 0100 tests just the second bit. So how do we set second bit to 1? A little CPU arithmetic says the value will be 15 or 1111, so that entire four bits is written back to memory, even though we have really only set one bit.

Now this is not useful for most applications. Most applications are representing data or information, up, down, true, false, open, shut.

We want to say things like:

if open then ... else ... end

or more likely apply that to a larger entity:

if door is open then -- most likely 'door.open' ... else ... end

'door is open' illustrates hierarchical addressing. The main system addressing gives the entity door, and door has its own addressing which gives access to open (and maybe other attributes).

Most sets also have more than two possible values (a set with one value never changes and therefore does not even need representation, so zero bits). For these we have enumerated sets, like (yellow, green, blue, purple haze, red). These define sets and types and the exact number of bits required is given by the number of values (log2 (number of values)).

Thus the optimal addressing really depends on the entity size used in the application - maybe even variable sized entities. But in most hardware such addresses must be translated to the fixed size the hardware defines. This of course could cost in terms of time. It should also be something that an automatic translator does (compiler or interpreter), not a programmer, just as such a system would generate code to test and set bits as above (if bits aren't directly addressable).

An important point here is not to think in terms of electronics - electronics is just a really good and fast way of processing computations. There is nothing magic about electronic computation that makes it possible to do computations you couldn't do otherwise. The magic is only in the speed. That is why low-level abstractions such as bit, byte, word, or hardware addressing mechanisms (pointers) are really not that useful.

$\endgroup$
-2
$\begingroup$

Our computer system used by default Byte addressable memory. Its one cell is pointing to 8-bits information. And cell size does not depend on the processor length. In word addressable memory one cell is pointing to one word information, but the word length depends on the processor length. When we use words addressable memory than its creates an ambiguity. So our computer use by default byte addressable memory.

$\endgroup$
  • $\begingroup$ Welcome to the site but I don't see how this answers the question. $\endgroup$ – David Richerby Aug 19 '15 at 7:40

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.