Consider a 32-bit microprocessor composed of 2 fields: the first byte contains the opcode and remainder an immediate operand or an operand address. What is the maximum directly addressable memory capacity?

Now the answer should be 2^24=16777216 bits = 2 megabytes but the solution set says 2^24=16 MBytes

So am I wrong or is the solution set wrong?

  • $\begingroup$ @HEKTO can u pls elaborate. google shows the conversion as 16 777 216 bits = 2.097152 megabytes $\endgroup$ Aug 4, 2014 at 16:34
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    $\begingroup$ The solution set was correct. You have $2^{24}=16\mathrm{M}$ possible addresses. If the memory was byte-addressable (each address was that of one byte) then the maximum addressable memory would be 16MB. $\endgroup$ Aug 4, 2014 at 21:16
  • $\begingroup$ @RickDecker I am sorry, still didn't get it. as I understand it is a 32 bit processor with the 1st 8 bits reserved for opcode. So the remaining 24 bits can give 2^24 bit combinations. How can 2^24 bit combinations address memory in bytes? I don't understand what u mean by "the memory was byte-addressable (each address was that of one byte)". I am actually learning computer science on my own so don't really understand the concepts well. If u could suggest some other reference material to help me clear my confusion. William Stalling's book is a little overwhelming $\endgroup$ Aug 5, 2014 at 5:06
  • $\begingroup$ See my answer. Hope it helps. $\endgroup$ Aug 5, 2014 at 17:31
  • $\begingroup$ @user3125707 where did you find the solution set? Trying to find it myself but cannot anywhere online. $\endgroup$
    – alelom
    Jan 25, 2020 at 12:21

2 Answers 2


Start with a simpler example. Suppose you only had 3 address bits, rather than 24. With $3$ bits we could have $2^3=8$ addresses: 000, 001, 010, 011, 100, 101, 110, 111. In this case, we could think of memory as being divided up into 8 chunks, of equal sizes, with one address per chunk:

memory:  chunk 0 | chunk 1 | chunk 2 | chunk 3 | chunk 4 | chunk 5 | chunk 6 | chunk 7
address:   000       001       010       011       100       101       110       111

For example, the contents of chunk 3 would be addressed by the three bits 011. Now how much memory would there be in total? It'll clearly be 8 times the size of a chunk. Stalling is using a memory model where the chunks are bytes, so with 3-bit addresses, we would have a total memory of $2^3=8$ bytes: one byte per address.

A different computer, though, might be built so that each chunk was 4 bytes. On such a machine with 3-bit addresses we would have $8\times 4 = 32$ bytes of memory, 4 bytes per address.

At any rate, with 24-bit addresses, we'd have $2^{24}= 16777216 = 16\text{M}$ possible addresses, hence that many possible chunks. If each chunk was a byte that would mean that the total addressable memory would be 16777216 bytes, or 16MB. Similarly, if each chunk was 4 bytes long, the total addressable memory would be (chunk size $\times$ number of addresses), or $4\text{B}\times 16\text{M} =64\text{MB}$.

  • $\begingroup$ thanks for a really simple explanation but I am sorry I have still some confusion. I am not a very bright person as u can see. My doubts are as follows: 1. What does one mean by "a 32 bit processor"? 2. What did u mean when u said "one byte per address" or "4 bytes per address" $\endgroup$ Aug 6, 2014 at 7:54
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    $\begingroup$ (1) It means several things, but for this problem it means that an instruction is 32 bits long. With a 1-byte opcode (8 bits), that leaves 32-8 = 24 bits for the address. (2) Think of memory as a collection of post office boxes, all of the same size. If each box was 1 byte in size, then one box number would get you one byte. If the boxes were, say, 4 bytes in size, then one box number would get you 4 bytes. $\endgroup$ Aug 6, 2014 at 14:41
  • $\begingroup$ Hi, Can u help me with one more issue. I am unable to post questions on stackoverflow. It says that I am banned and the only way to overcome the ban is to ask good questions. But the problem is if I can't post them how am I supposed to ask a good question at all? I think this site is really strict. I just asked two "bad" questions and I received a ban. If I was really a genius I wouldn't have been posting questions here at all... I hope u understand $\endgroup$ Aug 6, 2014 at 17:49
  • $\begingroup$ You're not going to like the first part of my answer, but you should like the second part. First part: this is not the right place for a comment like the one you just gave, since it's not about computer science. Second part: every site has an associated "meta" site just for questions and problems like the one in your comment, namely questions about the site. You can find CS.meta by going to the very top of this page, where it says "StackExchange" and mousing down to the "Meta" item. Go there and post your comment as a question. You'll surely get an answer. $\endgroup$ Aug 7, 2014 at 2:22
  • $\begingroup$ As a further remark, it appears that no one has welcomed you yet. Let me remedy that: Welcome to the site! Don't be discouraged by the consequences (like banning, which is only temporary) of not having mastered the intricacies of our culture. Many of us felt the same frustrations at the beginning; it'll go away if you participate a while and learn the ins and outs of the StackExchange ways of doing things. $\endgroup$ Aug 7, 2014 at 2:27

Most modern processors do not address memory at the granularity of single bits but limit the size of the smallest chunk of memory that can be accessed to an 8-bit byte. This is called byte-addressable memory.

With byte-addressable memory, a 24-bit immediate could directly address any of 224 bytes, i.e., 16 MiB.

Stallings is assuming byte-addressing, so 224 bytes would be directly addressable.

In the past, some processors used word-addressable memory, where the smallest chunk that could be accessed was equal to the size of the registers. By using a larger smallest chunk size, fewer bits were needed to address a given size of memory. E.g., with a 32-bit word size, a 24-bit immediate would be able to reference 224*4 bytes (64 MiB). (Using word-addressable memory also simplified memory access.)

Outside of some DSPs and embedded systems processors, word-addressable memory is not very popular today.

As a side note, some microcontrollers have special mechanisms for atomic bit addressing such bit-band regions (e.g., ARM), where a section of the address space is bit-addressable, and atomic set and atomic clear bit instructions (e.g., MIPS), where three bits of the instruction specify the bit within a byte.)

It might also be noted that some ISAs shift immediate values by the access size (e.g., accessing a 2-byte value would shift the immediate by one bit). This assumes that the base pointer and the address of the value are properly aligned, i.e., that the least bit is zero for a 2-byte value, the two least significant bits are zero for a 4-byte value, etc. This allows a smaller immediate to provide a larger access range when accessing values larger than a byte.

  • $\begingroup$ @"Paul A. Clayton" I am sorry but I couldn't understand a word of what u said. It went right over my head. I am just learning computer science out of curiosity so can u pls be a little easy with the terminology $\endgroup$ Aug 4, 2014 at 17:42
  • $\begingroup$ @user3125707 Did the edit help clarify the meaning? (I do have a bad habit of doing knowledge dump and it is easy to over-complicate an answer.) $\endgroup$ Aug 4, 2014 at 18:30
  • $\begingroup$ not it is not clear. Can u pls explain how u got 2^24*4 bytes $\endgroup$ Aug 4, 2014 at 18:48
  • $\begingroup$ @user3125707 That was for word-addressable memory using a 4-byte (32-bit) word. When the smallest addressable unit is 4 bytes, adding 1 to an address would move the address upward by 4 bytes. For the common byte-addressable memory, where the smallest unit of access is 8 bits/1 byte, a 24-bit immediate could directly address 2^24 bytes. $\endgroup$ Aug 4, 2014 at 19:08
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    $\begingroup$ @Jeff Because byte addressing is assumed. Bit granular addressing is primarily useful for handling memory mapped I/O where single bit accesses can have side effects (This was the motivation behind ARM's bitband region.). For locks (another case where read-modify-write might be problematic), not directly supporting writes smaller than a byte would typically only sacrifice a small amount of storage at worst. The tradeoffs for different granularities of addressing would be a different question. $\endgroup$ Jan 11, 2017 at 3:07

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