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In DRAM timing constraints, tFAW means length of a rolling window that allows up to four row activations in same Rank. This constraint is mainly due to power budget of each rank.

However, I am curious why 4 is the magic number?Would it be wrong if we use Eight Activation Window and double the value or use Two Activation Window and halve the value?

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The magic number is just 4 since (within one rank) you have just 8 banks where you can spread your consecutive accesses. The problem lies with the bank activation current drained from the entire array (or bank) of single cells (transistor + capacitor) needed to prepare the memory location to be read. If the consecutive read operations are falling each time in a different ROW within each bank than you have the activation problem kicking in each time. In order to avert a high current drain from the arrays you need to limit the number of consecutive bank activation over a rolling window of time. The reason why you need to prevent the bank from high energy / current drain is because this may cause a Voltage Reference (VR) deterioration. The VR is the standard Voltage level against which earch data read from the bank is compared to verify if what you are reading is 1 or a 0. Risking to alter the VR level may mean that the reliability of what your read or write is compromised.

However these tFAW and tRRD parameters are usually overestimated and a memory tuner may increase system performances by slightly changing these parameters.

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  • $\begingroup$ Thanks for the answer. Could you please clarify a bit more about the choice of 4. Imo, there are usually 8 banks in one rank, doesn't that make Two Activation Window also valid? as long as you halve the timing parameter. Indeed it is stricter than Four, but still makes sense, right? $\endgroup$
    – gmagogsfm
    Commented Jan 3, 2015 at 21:48

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