I think it stores the address of the current instruction. And if this instruction is completed the program counter is incremented by 1, to get the next instruction. But now my question is, how do you increment the program counter by 1? It would mean you increment an address by 1, how does this work?
Assuming a 32-bit architecture (with alignment), then instructions are words; that is, every instruction is composed of 4 bytes.
That implies that the bottom two bits of the address are byte offsets within the word; that is, the address 10001111 denotes 4th byte of the word at 10001100. When we're talking about instructions, however, we'll never need to fetch individual bytes -- we want whole words.
Different textbooks handle the program counter differently, but given that whichever paradigm you're using has the program counter incremented by 1 (rather than 4), that leads me to believe that the PC stores word address, rather than byte address.
Then, if the program counter is at 10001111 and we increment by 1, we do in fact get 10010000. To turn this word address into a byte address (so we can fetch the instruction from memory), we can simply left-shift by 4.
In short, if the program counter is at 10001111 (the word address), then the byte address of the instruction we'll actually be fetching is 1000111100. To fetch the next instruction, we can just increment the program counter by 1.
The program counter indicates the memory address of the current instruction. Depending on the architecture of the CPU it may be incremented by a fixed or a variable amount in order to point to the address of the next instruction. "You" the author of the program running on the CPU do not need to increment the PC, and it may not even be accessible to you. Instead the CPU itself handles incrementing it, which could be part of the circuitry of a hardware CPU, or part of the software of a CPU implement by a virtual machine.
Instructions are not necessarily of length 1 (byte).
After an instruction has been read from memory and interpreted*, the address held by program counter is incremented by the appropriate number of bytes (simply using an adder), ready to fetch the next instruction.
*In case of variable length instructions, the instruction decoder determines the instruction length on the fly.
You're correct that the program counter (PC) is a register that stores the memory address of the next instruction to be executed by the processor. After the current instruction is completed, the PC is incremented to point to the next instruction in memory.
Regarding your question on how the PC is incremented by 1, it's important to understand that the size of an instruction in memory is not always fixed. Depending on the architecture and instruction set of the processor, instructions can have different sizes.
For example, in a typical x86 processor, the size of an instruction can range from 1 byte (e.g., NOP instruction) to 15 bytes (e.g., complex instructions with prefixes). In such processors, the PC is incremented by the size of the instruction that was just executed.
To do this, the processor uses a technique called "instruction decoding". This involves analyzing the bits of the instruction in memory to determine its size, and then incrementing the PC accordingly. The processor may use various techniques to optimize this process, such as pre-fetching instructions from memory or caching recently executed instructions.
So, the size of the instruction is determined during the decoding phase, and the PC is incremented by that size to point to the next instruction in memory.