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I have a BNE-instruction (32 bits), which contains 16 bits for the jump field:

  • Opcode A[31:26]
  • RS A[25:21]
  • RT A[20:16]
  • Immed A[15:0]

Assuming the BNE-instruction will now be written in 64 bits format, what would be the (new) max jump distance this instruction can make?

I really have no clue, what to do, so I hope someone can help me. Thanks in advance.

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Depending on the architecture, the immediate for branches may mean a byte address (x86) or a word address if fixed width instructions are mandated, which means that for a 16bits offset, the range is something like -2^17 to +2^17-1

Having fixed 64bits-wide instructions is quite rare (VLIW domain). If you add 32 bits, and if you keep the same number of registers (hence 5 bits for RS and RT) and the opcode part, I guess these extra bits would end in the offset part, so 16+32bits offset. If instructions are fixed width, you may then have doubleword offsets : -2^-50 to +2^50-1

Practically, it does not make any sense to have such wide immediate offsets. No program is large enough to be several gigabyte long (I'm not counting libraries, which are generally called through indirect or direct branches over the full 32bits or 64bits address range, not conditional branches).

I could imagine that with 64bits instructions, some variants of the conditional branch instructions would offer 16 to 32bits immediate values, like : "BNE R1,#1234, @Somewhere" instead of using 48bits for the offset.

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  • $\begingroup$ Thanks! I still wondered, how'd you get 50 as an exponent, when the immed-field is 48 bits? $\endgroup$ – rjs44 Jan 3 '15 at 17:50
  • $\begingroup$ Well, this is a bit misleading, I wrote a byte offset. If you have byte addressable memory and 64bits wide instructions, instruction addresses can be A[63:3] or A[31:3]. The BNE offset can be added to a byte address or shifted 3bits to the left, so that "BNE +1" means 'to the next instruction' and not 'to the next byte which is unaligned wrt instruction boundaries) $\endgroup$ – TEMLIB Jan 3 '15 at 18:03
  • $\begingroup$ Note that byte addressable memory is not always needed. It really depends on the type of CPU you are targetting. Some DSPs have 48bits instructions, for example. $\endgroup$ – TEMLIB Jan 3 '15 at 18:05

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