How does cpu fetch active program data (using virtual address) from storage when there is a page fault?

Question

I read that cpu generates virtual address and using the same mmu translates to physical address and then fetches the data from RAM. But when there is a page fault, the data is fetched from the HDD(or Secondary Storage) where the program resides. But how does the cpu knows exact location of the program on storage device. Does it maps the virtual address to the address of storage device? If yes, how does it do ?

Answer 1

The CPU knows nothing about swapping. This is performed by the operating system.

When a memory access takes place, the MMU consults page tables to find the physical address that is associated to a virtual address. Each page tables contains a number of descriptors that explain to the MMU what the physical address is. A page fault occurs when the descriptor contains an invalid value (i.e. one that does not denote a physical address).

When a page fault occurs, the CPU transfers control to a predefined piece of code in kernel mode and sets a register to the problematic address. The kernel code looks up the address in its own tables to figure out whether it is swapped out or invalid. On many architectures, there are many unused bits in an invalid descriptor, which allows the kernel to store its own data in the page tables. Based on these values, if the kernel determines that the page is swapped out, it will allocate a physical memory page, load the content from swap, modify the content of the faulting descriptor to point to this physical page, and transfer control back to the program so that it executes the memory dereference again. If the kernel determines that the page is invalid, it typically terminates the application, or transfers control to its fault handler.

The layout of descriptors and of any additional kernel data structure is highly dependent on the processor architecture and the kernel. Here's a fictional, simplified example of how it might look like (real machines and operating systems tend to be a lot more complex).

• The machine is capable of addressing 4GB of virtual memory and 8TB of physical memory. Each page is 4kB. A page table consists of 1048576 descriptors, each of which occupies 4 bytes. (In the real world, MMUs use 2 or 3, sometimes 4 levels of descriptors, rather than a single gigantic table.)
• In each descriptor, the lowest bit indicates whether the descriptor is valid. If the lowest bit is 0, the descriptor is valid, and the corresponding physical page is $2^11 \times d$ where $d$ is the descriptor value. If the lowest bit is 1, the descriptor is invalid, and the MMU ignores the other bits. (In the real world, there are more bits in descriptors for permissions, cache maintenance, etc.)
• The operating system uses the 31 higher bits of invalid descriptors to locate a swapped-out page. The OS supports up to 8TB - 4kB of swap; the special value all-bits-one indicates an invalid page. Separate data structures map ranges of swap addresses to ranges of disk locations.