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This question already has an answer here:

I'm doing a question on architecture and I've come across this question which I do not understand how to answer the question.

Q. How many bits are required to address 4G x 32-bit main memory if

a) Main memory is word addressable b) Main memory is byte addressable

I have read this question Word- or byte-addressable? Correct terminology but it did not clear up my understanding of the question as I am NOT asking what is the difference between byte and word addressable, more specifically I want to understand this question I've written.

The answer given says we need 34 bits for byte addressable memory and 32 bits for word addressable memory. I have thought about this for a while and have come to this conclusion which I do not know if it is correct or not:

Each row in the main memory is 32 bits in width and if it is byte addressable then we have 4 bytes in each row. To select a byte from the row requires log2(4) = 2 bits. Row width + 2 = 34 bits? Similiar concept for 32 bits. Is this correct logic?

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marked as duplicate by David Richerby, Juho, Wandering Logic, Nicholas Mancuso, lPlant May 9 '15 at 17:19

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  • $\begingroup$ I have edited my post now, please re read it. Thank you. $\endgroup$ – Nubcake Apr 22 '15 at 11:56
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The error in your solution comes where you say "Row width + 2?" To select a byte in memory, you must (a) select a row, and (b) select a column.

Let's see how this works out for the byte-addressable case. As you say, selecting a column takes 2 bits, since there are 4 columns. However, the number of bits to select a row is log2(number of rows), not the row width [the row width is irrelevant]. So, figure out how many rows there are, then take the binary logarithm of that, and add 2 to it -- you'll get the correct number of bits needed to address byte-addressable memory.

The same methodology can be applied for the word-addressable case. Just count the number of bits needed to select a row, and the number of bits needed to select a column.

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  • $\begingroup$ I see! Thank you very much, I understood completely. I knew that there was something wrong with my intuition because it did not sit right with me; I thought something was odd when I said we select a byte within a row then why would we need 34 bits I thought. Now you mention a we need to select a column (byte) within the row, it all makes perfect sense to me. $\endgroup$ – Nubcake Apr 22 '15 at 16:38
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The question is probably about address bits, not data bits.

A 4G x 32bits memory size is 16Gbytes.

  • With a 8bits data bus, you need 34 address bits (typically A[33:0])
  • With a 32bits data bus, you need 32 address bits (typically A[33:2]. A[1:0] is for selecting individual bytes inside the 32bits word.)
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  • $\begingroup$ Ok I have thought about the answer for a while and I think I sort of understand it now but please correct me if my thinking is wrong: For the byte addressable memory, since we know the width of the row is 32 bits, we will have 4 bytes in each row. So to select a particular byte from a row would require log2(4) = 2 bits ; width of row + 2 = 34 bits for byte addressable memory. Similiar for word addressable except both of the answers you have given say we need 34 bits? (Your comment in brackets A[]). Also how do we know that the word size is 32 bits and not 16 or some other value? Thank you. $\endgroup$ – Nubcake Apr 22 '15 at 11:48

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