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In a simple architecture(not considering parallel architecture) how exactly this can be performed in a single clock cycle: P:R1 <- R2, R2 <-R1 where R1 and R2 are registers and P is a control variable.

I do not exactly understand when does this microoperation gets completed on the rising edge of the beginning of the cycle or just before clock transition.

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One way this can be performed in a single cycle is through register renaming. If the processor supports register renaming, no data needs to be moved: one simply renames which register is called R1 and which one is called R2.

If the processor doesn't support register renaming, the other option is that the data can simply be swapped between the two registers.

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  • $\begingroup$ How swapping will take place in 1 clock cycle considering registers to be positive edge triggered.I mean exact sequence of events with respect to the clock cycle.??? $\endgroup$
    – saladi
    Jul 25, 2015 at 6:22
  • $\begingroup$ @saladi, I see no reason why it'd be any different than any other 1-cycle read-compute-write update (e.g., incrementing R1). $\endgroup$
    – D.W. ♦
    Jul 25, 2015 at 6:46

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