Assume the CPU has 64 data lines. Then Z reading cycles will be needed to load an array of 12 double-precision floating-point numbers, each number coded in eight bytes, from the main memory into the CPU. Z = ?

So I'm looking at some of the past exam questions to prepare for my exams next year and this question (above) has stumped me. I genuinely don't know how to work this out. I know that a 64 bit machine is a lot faster than a 32 bit one but that's about it. Can anyone explain this? (Assume I am an idiot please)

## closed as unclear what you're asking by David Richerby, vonbrand, Jake, D.W.♦, codyAug 8 '15 at 16:37

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• "I know that a 64 bit machine is a lot faster than a 32 bit one but that's about it." -- that's wrong. One has little if anything to do with the other. This question is impossible to answer without knowing what CPU architecture you're referring to. – Raphael Aug 7 '15 at 11:03
• If it has 64 data lines, it can load a double (= 64 bits) in one read cycle, so it should need 12. – vonbrand Aug 7 '15 at 12:47
• Are you sure your question is copied accurately. I am no specialist, but on the net it seems that people talk of "data line" in the singular, and of $n$-bit data line. See this question answered by a hardware person. Telling us the level of your exam might also tell us what level of sophistication is needed to answer. What course is it, for what kind of curriculum. – babou Aug 8 '15 at 9:08