Is there a hardware interrupt that is pre-configured by the OS or something? Try to keep the answer on the scale of a register or so.

Are some special preparatory signals sent across the bridges to the hardware to make boundaries?


closed as unclear what you're asking by Pseudonym, vonbrand, Luke Mathieson, Gaste, cody Aug 24 '15 at 17:43

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How memory boundaries work depends on the system, but the most common method is a memory management unit (MMU) or a memory protection unit (MPU). Whenever the CPU makes a memory access, the address is analyzed by the MPU or MMU. An MPU either allows or forbid the access; an MMU is more powerful and translates the virtual address passed by the processor into a physical address used by the memory controller.

When the access is denied, this triggers a kind of interrupt (not necessarily an actual interrupt because it often comes from inside the CPU; the vocabulary depends on the architecture but it's often called trap or exception). Other than that, no interrupts are involved.

On most architectures, the MMU is part of the CPU. So MMU configuration does not involve any “signals sent across the bridges” (did you mean the buses?).

The MPU/MMU acts based on tables. The CPU sets the tables, generally by setting a register which contains a pointer to the main table. The operating system normally modifies the table whenever a context switch between tasks occurs or a task allocates or frees memory.

  • $\begingroup$ This is exactly the answer that I was looking for. I wasn't sure if this was implemented in some conversation protocol between the components and the CPU, mostly. It's interesting to know that this is a hardware component too. BTW: I think that I did mean buses :D $\endgroup$ – Mr. Minty Fresh Aug 23 '15 at 18:21
  • $\begingroup$ I've found out my confusion: I'd thought that the MMU's bank switching was integrated into the north and south bridge chips, which is why I'd said that instead of buses. $\endgroup$ – Mr. Minty Fresh Aug 23 '15 at 18:48

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