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My teacher told us that when the ram runs out of space it will push a program in the cache, i argued that the program should go to the swap space in the hard drive, plus the memory cache cannot hold instructions because instructions and data have different access patterns, it can only hold data frequently accessed. So i am asking the experts, can the memory cache hold instructions ?
Edit : what i mean by memory cache is the L1 memory cache

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Not perfectly sure whether i understood your question correctly. Basically, there are multiple questions:

A) 'when the system runs out of ram [...] push to cache' A cache is a dedicated storage to accelerate the access to often-used Resources. So no, neither ne CPU-cache nor any other cache is used to replace missing ram. I really think your professor wanted to explain SWAP

B) In fact, there are different architectures for computer systems. One of them is the Harvard Architecture where two different memories exist. One is reserved for instructions, while the other is used for data. This Architecture is used by the popular AVR Microcontrollers from Atmel and other MCUs.

The other architecture is the von-Neumann-architecture (sometimes also called Princeton-architecture). This one has exactly one memory, which is used for instructions and data. This architecture is used in all Computer systems we know as 'PC' today. This architecture is by the way the reason for most of the really bad security problems (e.G. buffer overflows). In a vulnerable software, an attacker can put instructions somewhere in the memory (the sections which originally should only hold 'data' like strings), and it'll be executed by the processor if its in the 'correct' location.

To return to your question: The CPU-cache doesn't care which memory gets cached. It's simply memory. The sections which are accessed more often will be cached. In a recursive function (many branches to the same location in the one memory), the CPU cache may hold instructions.

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  • $\begingroup$ thank you thank you, i can't thank you enough, but again, thank you ;) $\endgroup$ – Baroudi Safwen Sep 14 '15 at 23:17
  • $\begingroup$ Good answer. In addition, code injection in Harvard Arch. is more difficult but not impossible, here is some well documented evidence. $\endgroup$ – JosEduSol Sep 15 '15 at 6:22
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tillz is broadly correct, however there is one more detail of many modern systems which you should be aware of.

On some modern CPUs, when the power is first turned on and the CPU transfers control to firmware, almost all of the hardware needs to be initialised before it's used. This includes the hardware which arbitrates between cores in a multicore machine. One upshot of this is that main memory may not be available.

So some CPUs (notably Intel-esque machines) do support a mode where cache can be used as if it were RAM. Intel calls this "no-fill mode", and AMD calls it "cache-as-RAM mode". This is handled by the same mechanism that the CPU uses to implement non-cached memory (e.g. memory-mapped I/O).

On most modern CPUs, L1 cache split in two: an instruction cache, which is read-only, and the data cache, which is read-write. It does this so that the CPU pipeline can maintain the illusion of a Harvard architecture on top of a von Neumann architecture: the L1 instruction cache is "program memory" and the L1 data cache is "data memory", and they sit on top of a combined lower-level (probably L2) cache. "Combined" here means "both instructions and data", that is, it implements the von Neumann memory model.

Because the L1 instruction cache is read-only, the only way you can get anything in it is by filling from somewhere, and that somewhere is the next-level cache. So it's actually the lower-level cache which is acting as RAM, not the L1 cache.

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