The Computer Science text book I own describes how an interrupt is handled in an operating system:

  • At some point at the end of an instruction the processor checks if there are any outstanding interrupts
  • If there are, the priority of the present task is compared with the highest priority interrupt
  • If there is a higher priority interrupt, the current job is suspended
  • The contents of the special registers are stored so that the job can be restarted later (aren't general purpose registers preserved as well? or do ISRs do not use these?)
  • Interrupts are then serviced until all have been dealt with
  • Control is returned to the original job
  • If the current task has more priority than the interrupt, it is queued and serviced later

The last point "If the current task has more priority than the interrupt, it is queued and serviced later". Does this mean that if an I/O interrupt is generated but the current tasks are all very high priority, they will not get serviced (ignored)? moreover, how does the computer determine when to service these if the current task is more "important"?


I quite disagree with your textbook.

First, Interrupts can be very different between architectures. Most does not support nesting interrupts, while others allow some forms of it (fast interrupts for time critical operations in embedded...)

One can imagine a CPU having 3 modes :

  • User
  • Supervisor
  • Interrupt

When the interrupt request signal[s] is active, the CPU automatically saves a few registers, sets the supervisor flag and branches into the interrupt vector. If several interrupts occurs simultaneously, the highest priority interrupt is taken. If one or several interrupts becomes active while the CPU is already in interrupt processing mode, it will wait until the end of the current interrupt service routine to eventually process the next highest level interrupt. This is similar when interrupts are temporarly masked by the OS when it is updating some structures...

Which registers are saved depends a lot of the type of CPU. The minimum is just being able to resume execution later : PC, flags, one register. You can also have a full set of shadow registers reserved for interrupts and which don't need to be saved.

OS tasks are not interrupts. There is usually a timer that regularly tiggers an interrupt which, in turn, wakes the scheduler for switching tasks. It is also done by I/O related interrupts : A network packet is received, an interrupt is triggered, the Ethernet NIC interrupt routine tells the OS to wake the network daemon...

No task has higher priority than interrupts.

Because while being in "interrupt" mode, the CPU cannot be interrupted and cannot process higher priority stuff, OSes try to spend as little time as possible in that state, they instead schedule tasks to asynchronously process events, for one or several symmetric CPUs.


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