I'm having some trouble figuring out where the "Carry in" value comes from in respects to a one bit full adder diagram. I understand the below half adder,


but my question is: is the the output of the bottom-most AND gate in the bottom diagram equal to the output "C" in the top diagram (Assuming A and B are constant throughout) - Is Cin from the bottom diagram equal to C in the top diagram?


  • $\begingroup$ If you want to add two $n$ bits numbers $A=a_{n-1} \ dots a_0$ and $B=b_{n-1} \ dots b_0$, you'll need $n-1$ full adders linked so that $C^{in}_i = C^{out}_{i-1}$ (you can use an half-adder for adding $a_0$ and $b_0$). $\endgroup$ Dec 29, 2015 at 17:01
  • $\begingroup$ Of course. $C$ stands for $C_{out}$. $\endgroup$
    – user16034
    Dec 29, 2015 at 18:22

1 Answer 1


The C's are not the same, but your statement about the AND gate is right.

Unfortunately, the people who drew your full-adder decided to save space instead of maximizing readability. This image does a better job of showing the relationship between half adders and full adders, even though the circuit is identical to the one above:

Full adder

If they'd just put the wire splitting points inside the grey boxes showing the half-adders instead of outside, they'd be perfect.

Here's a block diagram you can use to see the exact relationship between a half-adder and an adder. It shows clearly something I find quite interesting about adders. The 'or' at the end looks like it could swallow a carry if both half adders were to emit a carry bit at the same time. It seems like we might need another half adder to resolve this, in a never ending chain. However, if you run the truth tables for the half-adder, you find that it is impossible for both half-adders to carry at the same time. Rejoice!

Full Adder 2


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