# Know when we have a cache default and if it loads

I have an exercise about cache memory, first the cache is empty :
I have a cache memory with 16 lines and each lines have 16 octet, the address is 16 bits

So I know that the INDEX will be composed of 4 bits and the offset will be composed of 4 bits too So i will have this :

bits number : (15 ... TAG... 8)(7.. INDEX.. 4) (3 .... OFFSET .... 0 )

Now if have to say if there is cache default or NOT and say if it will Loads or Not. Adress that I have :

3000 : tag = 30 / index = 0 , offset 0

2040 : tag = 20 / index = 4 , offset = 0

3001 : tag = 30 / index = 0 , offset = 1

2404 : tag =24 / index = 0 , offset = 4

3002 : tag = 30 / index = 0, offset = 2

20C4 tag = 20 / index = 12 , offset =4

3003 tag = 30 / index= 0 , offset =3

24C4 tag = 24 / index = 12 , offset = 4

If someone can explains me how I know if it loads and if I have a cache default, I would be very happy. Thanks

• Starting with an empty cache.
• Assuming direct map

Tag memory will contain for the 16 indexes the addresses [15:8] and a "valid" bit

3000 : Miss -> Load 30 into tag 0 and fill line (3000..300F)
2040 : Miss -> Load 20 into tag 4 and fill line (2040..204F)
3001 : Hit : Already in the cache
2404 : Miss -> Load 24 into tag 0 and fill line (replaces 3000..300F -> 2400..240F)
3002 : Miss -> Load 30 into tag 0 and fill line (replaces 2400..240F -> 3000..300F)
20C4 : Miss -> Load 20 into tag C and fill line (20C0..20CF)
3003 : Hit : Already in the cache
24C4 : Miss -> Load 24 into tag C and fill line (24C0..24CF)


Very few hits here, would greatly benefit from a two ways set-associative cache.

• Thanks you very much for your answer ! So I don't care about the offset number ? And I don't understand when you say fill line with ( 3000 ... 300F) for example. What will the line become ? The second question of my exercise is with a 2set association where the line of the cache is associated with the line i+8. I will try to do it after – Foushi Jan 12 '16 at 21:02
• So for 2-set associative where each line i <= 7 is associated with line i+8 I would have : 3000 : Miss -> Load 30 into tag 0 2040 : Miss -> Load 20 into tag 4 3001 : Hit 2404 : Miss -> Load 24 into tag0 but second block (?) 3002 : Hit 20C4 : Hit (because Line 4 is associate with 12 (i+8) 3003 : Hit 24C4 : Miss -> Load 24 into tag 4 second block – Foushi Jan 12 '16 at 21:12
• Each time a line is loaded, all the 16 bytes from that line are read at once. – TEMLIB Jan 12 '16 at 21:14
• Usually, a two ways cache is being able to cache two lines for each index : In your example, there is a cache way with tag 0 = 30 and the other way tag 0 = 24, or tag C = 20 for the first way and tag C = 24 for the second way. The cache is then twice larger. If you must keep the same cache size, you will have A[15:7] in tags and A[6:4] as indexes. – TEMLIB Jan 12 '16 at 21:21
• Thanks you for your help, now I understand better. And another question, for an associative cache, the offset size is still the same because the adress is still 16 bits so 4 bits? only the index and the tags will change right ? Because I saw some draw on internet where there is no offset for an associative cache – Foushi Jan 12 '16 at 21:28